mirror of https://github.com/thesofproject/sof.git
126 lines
3.3 KiB
Plaintext
126 lines
3.3 KiB
Plaintext
#
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# Topology for SKL+ HDA Generic machine w/ iDISP codec only
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#
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# if XPROC is not defined, define with default pipe
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ifdef(`DMICPROC', , `define(DMICPROC, eq-iir-volume)')
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ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, eq-iir-volume)')
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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include(`hda.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include bxt DSP configuration
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include(`platform/intel/bxt.m4')
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# Define pipeline id for intel-generic-dmic.m4
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# to generate dmic setting
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ifelse(CHANNELS, `0', ,
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`
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define(DMIC_PIPELINE_48k_ID, `5')
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define(DMIC_PIPELINE_16k_ID, `6')
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include(`platform/intel/intel-generic-dmic.m4')
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'
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)
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#
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# Define the pipelines
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#
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# PCM1 ----> volume -----> iDisp1
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# PCM2 ----> volume -----> iDisp2
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# PCM3 ----> volume -----> iDisp3
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#
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl period, priority, core,
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dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
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dnl time_domain, sched_comp)
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# Low Latency playback pipeline 2 on PCM 1 using max 2 channels of s32le.
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# Set 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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2, 1, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 3 on PCM 2 using max 2 channels of s32le.
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# Set 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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3, 2, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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# Low Latency playback pipeline 4 on PCM 3 using max 2 channels of s32le.
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# Set 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
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4, 3, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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#
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl deadline, priority, core)
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# playback DAI is iDisp1 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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2, HDA, 0, iDisp1,
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PIPELINE_SOURCE_2, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp2 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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3, HDA, 1, iDisp2,
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PIPELINE_SOURCE_3, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# playback DAI is iDisp3 using 2 periods
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# Buffers use s32le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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4, HDA, 2, iDisp3,
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PIPELINE_SOURCE_4, 2, s32le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# PCM Low Latency, id 0
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dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
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PCM_PLAYBACK_ADD(HDMI1, 1, PIPELINE_PCM_2)
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PCM_PLAYBACK_ADD(HDMI2, 2, PIPELINE_PCM_3)
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PCM_PLAYBACK_ADD(HDMI3, 3, PIPELINE_PCM_4)
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#
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# BE configurations - overrides config in ACPI if present
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#
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# 3 HDMI/DP outputs (ID: 1,2,3)
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DAI_CONFIG(HDA, 0, 1, iDisp1,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 0, 48000, 2)))
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DAI_CONFIG(HDA, 1, 2, iDisp2,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 1, 48000, 2)))
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DAI_CONFIG(HDA, 2, 3, iDisp3,
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HDA_CONFIG(HDA_CONFIG_DATA(HDA, 2, 48000, 2)))
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VIRTUAL_DAPM_ROUTE_OUT(iDisp1_out, HDA, 0, OUT, 2)
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VIRTUAL_DAPM_ROUTE_OUT(iDisp2_out, HDA, 1, OUT, 3)
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VIRTUAL_DAPM_ROUTE_OUT(iDisp3_out, HDA, 2, OUT, 4)
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VIRTUAL_WIDGET(iDisp3 Tx, out_drv, 0)
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VIRTUAL_WIDGET(iDisp2 Tx, out_drv, 1)
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VIRTUAL_WIDGET(iDisp1 Tx, out_drv, 2)
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