mirror of https://github.com/thesofproject/sof.git
125 lines
2.6 KiB
C
125 lines
2.6 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2016 Intel Corporation. All rights reserved.
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*
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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*/
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#ifndef __ZEPHYR_RTOS_SOF_H__
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#define __ZEPHYR_RTOS_SOF_H__
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#include <sof/common.h>
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#include <sof/lib/memory.h>
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#include <rtos/spinlock.h>
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#ifndef CONFIG_ZEPHYR_NATIVE_DRIVERS
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struct cascade_root;
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#endif
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struct clock_info;
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struct comp_driver_list;
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struct dai_info;
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struct dma_info;
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struct dma_trace_data;
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struct ipc;
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struct ll_schedule_domain;
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struct mm;
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#ifndef CONFIG_ZEPHYR_NATIVE_DRIVERS
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struct mn;
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#endif
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struct ams_shared_context;
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struct notify_data;
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struct pm_runtime_data;
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struct sa;
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struct trace;
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struct pipeline_posn;
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struct probe_pdata;
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/**
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* \brief General firmware context.
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* This structure holds all the global pointers, which can potentially
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* be accessed by SMP code, hence it should be aligned to platform's
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* data cache line size. Alignments in the both beginning and end are needed
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* to avoid potential before and after data evictions.
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*/
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struct sof {
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/* init data */
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int argc;
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char **argv;
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/* ipc */
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struct ipc *ipc;
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/* system agent */
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struct sa *sa;
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/* DMA for Trace*/
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struct dma_trace_data *dmat;
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/* generic trace structure */
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struct trace *trace;
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/* platform clock information */
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struct clock_info *clocks;
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/* timer domain for driving timer LL scheduler */
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struct ll_schedule_domain *platform_timer_domain;
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/* DMA domain for driving DMA LL scheduler */
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struct ll_schedule_domain *platform_dma_domain;
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/* memory map */
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struct mm *memory_map;
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/* runtime power management data */
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struct pm_runtime_data *prd;
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#ifdef CONFIG_AMS
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/* asynchronous messaging service */
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struct ams_shared_context *ams_shared_ctx;
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#endif
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/* shared notifier data */
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struct notify_data *notify_data;
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/* platform dai information */
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const struct dai_info *dai_info;
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/* platform DMA information */
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const struct dma_info *dma_info;
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#ifndef CONFIG_ZEPHYR_NATIVE_DRIVERS
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/* cascading interrupt controller root */
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struct cascade_root *cascade_root;
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#endif
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/* list of registered component drivers */
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struct comp_driver_list *comp_drivers;
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#ifndef CONFIG_ZEPHYR_NATIVE_DRIVERS
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/* M/N dividers */
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struct mn *mn;
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#endif
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/* probes */
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struct probe_pdata *probe;
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/* pipelines stream position */
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struct pipeline_posn *pipeline_posn;
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#ifdef CONFIG_LIBRARY_MANAGER
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/* dynamically loaded libraries */
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struct ext_library *ext_library;
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#endif
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#if CONFIG_IPC_MAJOR_4
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/* lock for fw_reg access */
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struct k_spinlock fw_reg_lock;
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#endif
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__aligned(PLATFORM_DCACHE_ALIGN) int alignment[0];
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} __aligned(PLATFORM_DCACHE_ALIGN);
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struct sof *sof_get(void);
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#endif /* __ZEPHYR_RTOS_SOF_H__ */
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