mirror of https://github.com/thesofproject/sof.git
275 lines
6.4 KiB
Plaintext
275 lines
6.4 KiB
Plaintext
# SPDX-License-Identifier: BSD-3-Clause
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mainmenu "SOF $(PROJECTVERSION) Configuration"
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comment "Compiler: $(CC_VERSION_TEXT)"
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menu "CAVS"
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depends on CAVS
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config HP_MEMORY_BANKS
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int "HP memory banks count"
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default 8
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help
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Available memory banks count for High Performance memory
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Lowering available banks could result in lower power consumption
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Too low count should result in unresponsive/crashing image due to not
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enough space for FW base image
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Banks are 64kb in size.
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config LP_MEMORY_BANKS
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int "LP memory banks count"
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default 1
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depends on LP_SRAM
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help
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Available memory banks count for Low Power memory
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config LP_SRAM
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bool "Enable LPSRAM memory"
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default n
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help
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Turn ON/OFF LPSRAM bank/s. This provides an option to enable an LPSRAM
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memory for specific platform. Until this options is enabled firmware will
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not enable any of LPSRAM memory banks.
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config CAVS_LPS
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bool "Intel cAVS Low Power Sequencer for Power Management"
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depends on CAVS
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default n
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help
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Select this to enable Intel cAVS Low Power Sequencer.
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This option is required to support S0ix/D0ix mode
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on cAVS platforms.
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endmenu
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config WAITI_DELAY
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bool
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default n
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help
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LX6 Xtensa platforms may require additional delay to flush loads
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and stores before entering WAITI.
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config HOST_PTABLE
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bool
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default n
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config BOOT_LOADER
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bool
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default n
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config HAVE_RESET_VECTOR_ROM
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bool
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default n
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help
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Select if your platform has the reset vector
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in ROM.
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config IRQ_MAP
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bool
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default n
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config DMA_GW
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bool
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default n
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config MEM_WND
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bool
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default n
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config INTEL_IOMUX
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bool
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default n
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config HW_LLI
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bool
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default n
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help
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Hardware linked list is the DW-DMA feature, which allows
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to automatically reload the next programmed linked list
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item from memory without stopping the transfer. Without
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it the transfer stops after every lli read and FW needs
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to manually setup the next transfer.
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Any platforms with hardware linked list support
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should set this.
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config DW_DMA_AGGREGATED_IRQ
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bool
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default n
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help
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Some platforms cannot register interrupt per DW-DMA channel
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and have the possibility only to register interrupts per
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DMA controller, which require manual handling of aggregated
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irq.
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Any platforms with DW-DMA aggregated interrupts support
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should set this.
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config DMA_SUSPEND_DRAIN
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bool
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default n
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help
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Some platforms cannot just simple disable DMA
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channel during the transfer, because it will
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hang the whole DMA controller. Instead we can
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suspend the channel and drain the FIFO in order
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to stop the channel as soon as possible.
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Any platforms without the ability to disable
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the DMA channel right away should set this.
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config DMA_FIFO_PARTITION
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bool
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default n
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help
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Some platforms require to manually set DMA
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FIFO partitions before starting any transfer.
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Any platforms without automatic FIFO partitions
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should set this.
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config INTERRUPT_LEVEL_1
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bool
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default n
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help
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Select if the platform supports any interrupts of level 1.
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Disabling this option allows for less memory consumption.
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config INTERRUPT_LEVEL_2
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bool
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default n
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help
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Select if the platform supports any interrupts of level 2.
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Disabling this option allows for less memory consumption.
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config INTERRUPT_LEVEL_3
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bool
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default n
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help
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Select if the platform supports any interrupts of level 3.
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Disabling this option allows for less memory consumption.
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config INTERRUPT_LEVEL_4
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bool
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default n
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help
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Select if the platform supports any interrupts of level 4.
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Disabling this option allows for less memory consumption.
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config INTERRUPT_LEVEL_5
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bool
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default n
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help
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Select if the platform supports any interrupts of level 5.
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Disabling this option allows for less memory consumption.
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source "src/Kconfig"
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choice
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prompt "Optimization"
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default OPTIMIZE_FOR_PERFORMANCE
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help
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Controls how compiler should optimize binary.
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This config should affect only compiler settings and is
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not meant to be used for conditional compilation of code.
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config OPTIMIZE_FOR_PERFORMANCE
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bool "Optimize for performance"
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help
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Apply compiler optimizations prioritizing performance.
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It means -O2 for GCC or equivalent for other compilers.
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config OPTIMIZE_FOR_SIZE
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bool "Optimize for size"
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help
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Apply compiler optimizations prioritizing binary size.
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It means -Os for GCC or equivalent for other compilers.
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config OPTIMIZE_FOR_DEBUG
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bool "Optimize for debug"
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help
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Apply compiler optimizations prioritizing debugging experience.
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It means -Og for GCC or equivalent for other compilers.
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config OPTIMIZE_FOR_NONE
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bool "Don't optimize"
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help
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Apply no compiler optimizations.
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It means -O0 for GCC or equivalent for other compilers.
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endchoice
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menu "Debug"
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config DEBUG
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bool "Enable debug build"
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default n
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help
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Select for debug build
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config GDB_DEBUG
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bool "GDB Stub"
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default n
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help
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Select for GDB debugging
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config DEBUG_HEAP
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bool "Heap debug"
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default n
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help
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Select for enable heap alloc debugging
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config DEBUG_BLOCK_FREE
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bool "Blocks freeing debug"
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default n
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help
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It enables checking if free was called multiple times on
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already freed block of memory. Enabling this feature increases
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number of memory writes and reads, due to checks for memory patterns
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that may be performed on allocation and deallocation.
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config DEBUG_LOCKS
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bool "Spinlock debug"
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default n
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help
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It adds additional information to the spinlocks about
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the current user of the lock. Also executes panic
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on deadlock.
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config DEBUG_LOCKS_VERBOSE
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bool "Spinlock verbose debug"
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depends on DEBUG_LOCKS
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default n
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help
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In addition to DEBUG_LOCKS it also adds spinlock traces
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every time the lock is acquired.
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config BUILD_VM_ROM
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bool "Build VM ROM"
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default n
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help
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Select if you want to build VM ROM
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config DEBUG_IPC_COUNTERS
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bool "IPC counters"
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depends on CAVS
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depends on DEBUG
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default n
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help
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Select for enabling tracing IPC counter in SRAM_REG mailbox
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config PERFORMANCE_COUNTERS
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bool "Performance counters"
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default n
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help
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Enables tracing of simple performance measurements.
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A basic use case is to measure number of platform & cpu clock ticks
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passed between two checkpoints (init() and stamp()), for example
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total time spent on running low latency scheduler tasks.
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Platforms that gate cpu clock in wait-for-interrupt calls may also
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use the stamp() macro periodically to find out how long the cpu
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was in active/sleep state between the calls and estimate the cpu load.
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endmenu
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