mirror of https://github.com/thesofproject/sof.git
100 lines
2.4 KiB
C
100 lines
2.4 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2022 Intel Corporation. All rights reserved.
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*
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* TODO: IMX support, today IRQ is supported via SOF xtos API.
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*/
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#ifndef __ZEPHYR_RTOS_INTERRUPT_H__
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#define __ZEPHYR_RTOS_INTERRUPT_H__
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#if defined(CONFIG_IMX)
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/* imx currently has no IRQ driver in Zephyr so we force to xtos IRQ */
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#include "../../../xtos/include/rtos/interrupt.h"
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#else
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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#include <stdint.h>
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/* to be removed once driver upstream in Zephyr */
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#define __SOF_DRIVERS_INTERRUPT_H__
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#include <platform/drivers/interrupt.h>
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static inline int interrupt_register(uint32_t irq, void(*handler)(void *arg), void *arg)
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{
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#ifdef CONFIG_DYNAMIC_INTERRUPTS
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return arch_irq_connect_dynamic(irq, 0, (void (*)(const void *))handler,
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arg, 0);
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#else
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tr_err(&zephyr_tr, "Cannot register handler for IRQ %u: dynamic IRQs are disabled",
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irq);
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return -EOPNOTSUPP;
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#endif
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}
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/* unregister an IRQ handler - matches on IRQ number and data ptr */
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static inline void interrupt_unregister(uint32_t irq, const void *arg)
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{
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/*
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* There is no "unregister" (or "disconnect") for
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* interrupts in Zephyr.
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*/
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irq_disable(irq);
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}
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/*
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* CAVS IRQs are multilevel whereas BYT and BDW are DSP level only.
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*/
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static inline int interrupt_get_irq(unsigned int irq, const char *cascade)
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{
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#if defined(CONFIG_LIBRARY) || defined(CONFIG_ACE)
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return irq;
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#else
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if (cascade == irq_name_level2)
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return SOC_AGGREGATE_IRQ(irq, IRQ_NUM_EXT_LEVEL2);
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if (cascade == irq_name_level5)
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return SOC_AGGREGATE_IRQ(irq, IRQ_NUM_EXT_LEVEL5);
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return SOC_AGGREGATE_IRQ(0, irq);
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#endif
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}
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/* enable an interrupt source - IRQ needs mapped to Zephyr,
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* arg is used to match.
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*/
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static inline uint32_t interrupt_enable(uint32_t irq, void *arg)
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{
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irq_enable(irq);
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return 0;
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}
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/* disable interrupt */
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static inline uint32_t interrupt_disable(uint32_t irq, void *arg)
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{
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irq_disable(irq);
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return 0;
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}
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/* TODO: using SOF versions */
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void interrupt_mask(uint32_t irq, unsigned int cpu);
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void interrupt_unmask(uint32_t irq, unsigned int cpu);
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void interrupt_clear_mask(uint32_t irq, uint32_t mask);
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/* handled by Zephyr */
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static inline void platform_interrupt_init(void) {}
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/* disables all IRQ sources on current core */
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#define irq_local_disable(flags) \
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(flags = arch_irq_lock())
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/* re-enables IRQ sources on current core */
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#define irq_local_enable(flags) \
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arch_irq_unlock(flags)
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#endif /* IMX */
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#endif /* __ZEPHYR_RTOS_INTERRUPT_H__ */
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