DFDSPBRCP register have been renamed to DSPCS in Zephyrs commit
21f278c04bc258eb344ac5b2123b49d760b5b71d. This commit changes the
references from old to new name.
Changed zephyr revision to d9c4ec31fc49e7eef3c8c3b0d07827cc04e6efee
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Updates Zephyr to current top: e4fcb32451c587a3e4ba7f8bf3fc602b16f9652b.
This is to enable ALH multi-gateway feature. The required Zephyr commit
for Intel ADSP MTL is:
https://github.com/zephyrproject-rtos/zephyr/pull/53066
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
upgrade rimage to
ba8534bb23ba8534bb23 Fix bitmap according to the IMR type
f3eef3cfb6 Fix IMR type parsing
bdba8259fe Add a command line option to set an Intel-specific PV bit
1c48208850 config: tgl-cavs: add smart amp test module config
082b6261c9 config: Add mt8188.toml
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Zepych update: total of 73 commits.
Changes include adding power domains to DMA interfaces and allowing to
skip context save during d3.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Total of 440 commits, including following related to
intel_adsp/sparse/dmic/xtensa:
603cc2704579 dma: Add max block count attribute
2c162449eb4c xtensa: linker: Fix#52539 by updating the linker scripts
2dd4cbc75592 dts: xtensa: intel: update cavs25_tgph to match cavs25
Link: https://github.com/thesofproject/sof/issues/6710
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Updated zephyr to the latest version with
the necessary patches
a requried kconfig option is added because of
https://github.com/zephyrproject-rtos/zephyr/pull/51738
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
The intent was to stop people from cloning the sof manifest git repo
under a different name than "sof". It did not work, I had to help
multiple people who did it anyway.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
upgrade rimage to
3ee717eebc3ee717eebc probe: mtl.toml invaliv probe type
1f4a36e21f mux: fix module type
dcfd11bc4d mux: add mux cfg to list of modules
d957e0368b rimage: make ace15 signing to support openssl3
a1b6e6db33 manifest: add fw_ver_micro to manifest
fb28357912 config: mtl: add probe module
Signed-off-by: Kwasowiec, Fabiola <fabiola.kwasowiec@intel.com>
Trying avoid out-of-sync situations like commit a3b3c525d1 ("west:
update to newer rimage baseline").
Also explain why sof cannot be cloned as "sof2"
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Upgrade Zephyr from 0956647aaf6bd2b1e840adcc86db503f274d84a9 to
ed661a6c6909b338035b026cfc101ddda65ab8eb (1020 commits, including
441 since v3.2.0 tag).
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Update Zephyr to 0956647aaf6bd2b1e840adcc86db503f274d84a9 (3.2.0-rc1
plus a few fixes merged to upstreamed after the tag).
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Update zephyr to commit dcda3eab8df7 ("tests: net: socket: tcp: move to
new ztest API").
Needed to bring in support for Intel mtrace logging backend.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Update zephyr to commit 8e55e59c5917 ('arch: introduce config DCLS').
Fixes build errors due to missing core-isa.h with tgl Intel target with
gcc build chain.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Added versioning to scripts/xtensa-build-zephyr.py to get version
information when incompatible changes are done to the script.
Added yml schema version number to west.yml manifest.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Added west.yaml file, that manages zephyr repo and its dependencies.
Additionally west manifest may now control sof submodules.
Added submanifests directory with README.txt file so the
submanifests directory exists in version control - otherwise
west update command returns error. This is bug described in
https://github.com/zephyrproject-rtos/west/issues/594 .
Co-developed-by: Andrey Borisovich <andrey.borisovich@intel.com>
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>