Add HiFi3 & HiFi5 implementation of function cir_buf_copy.
Compared with generic C version, the HiFi3 version can save
about 3% cycles and HiFi5 version can save about 40% cycles.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Use while (shorts > 0) instead of while (short) to reduce the forever
loop risk.
Use general instruction AE_MIN32 replace AE_MIN_32_signed which is an
internal proto intended for Xtensa compiler.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Add HiFi5 implementation if function audio_stream_copy, compared
with HiFi3 version, the HiFi5 method can save about 29% cycles.
Signed-off-by: Andrula Song <andrula.song@intel.com>
The native SAI and ESAI drivers use a different handshake
encoding. As such, when using native Zephyr drivers use a
different function for decoding the channel from the handshake.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
In the case of some DAIs, the DMA slot may be encoded
differently in the DAI configuration handshake. As such,
we can't count on the fact that the handshake itself can
be used as the DMA slot. To fix this, add a function which
parses the handshake and allows each DAI to use its own
encoding of the DMA slot inside the handshake.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Currently, the DAI component's state is not updated on
dai_trigger() operation, which leads to pipeline_comp_copy()
skipping the dai_copy() operation (since the DAI component
never transitions to the ACTIVE state). To fix this, add
a state transition in dai_comp_trigger_internal(). Also,
make sure not to trigger the DAI component if already in
the requested state.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Some DMACs (e.g: NXP's EDMA) can automatically adjust the source and
destination addresses upon transfer completion. As such, we need to
indicate how the adjustment should be performed. In the case of playback,
the source address should be decremented, while in the case of capture,
the destination address should be decremented.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since now there's a Zephyr driver for NXP's SAI, the dai_set_config()
should be modified to also allow the configuration of the SAI.
As such, this commit introduces a new case for NXP's SAI that does
exactly that.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since the EDMA and HOST DMA nodes have been introduced to
the i.MX93 overlay, add entries in the dma array which will
create a struct dma for each of these DMACs.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since the Zephyr SAI driver is now enabled, add an entry in
the zephyr_dev array, which will resolve to multiple
"struct device *", one for each SAI node specified in the DTS.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Source and destination addresses cannot be NULL. As such,
set them to the values found in the first element of
hd->config's elem_array. This is fine to do because the host
component uses only 1 block.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
With every copy() operation, the source and destination addresses
keep getting modified. As such, for each re-configuration performed
during host_copy_one_shot(), the HOST DMAC needs to be made
aware of these changes.
This commit changes host_copy_one_shot() such that on each
dma_config() call the DMAC driver receives the updated
addresses and size.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since the DMAC is configured in a somewhat different way in the
native case vs the non-native case, add a native version of the
ipc_get_page_descriptors() function and remove the Zephyr-specific
functions from the non-native version of said function.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Convert the smart-amp-test in its IPC4 version to a loadable LLEXT
module. Use an overlay configuration to select between monolithic and
modular builds.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
While modules are in use, no need to unload and re-load them,
re-initialising audio interfaces is enough. With llext modules this
uses the LLEXT reference counting to identify when a module should be
unloaded.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The first part modules_new() is only needed when a new module is
registered, the rest is needed every time a module is instantiated.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
lib_manager_allocate_module() returns a pointer as an integer, use
uintptr_t for it.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Regroup code in modules_init() to move declarations and assignments
closer to where they're needed.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Pointers that we store in a global array for each loaded library,
aren't really firmware manifest descriptor pointers, they're pointers
to storage buffers, where entire libraries are stored. A
SOF_MAN_ELF_TEXT_OFFSET offset has to be added to that address to get
to the manifest descriptor.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Module adapter drivers can be loaded and unloaded, using the Zephyr
loadable extension API. Add its context to struct struct module_data.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
lib-manager is module-adapter specific, it doesn't need the component
API and shouldn't use struct comp_driver in function arguments.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Add support for loadable modules, built for dynamic linking with
Zephyr's LLEXT API.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Use the xtense intrinsic instrunctions directly can save
at least 10% cycles for those functions, and save about
0.9mcps for DRC component.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Fixes a lot of instances of this warning:
Node.js 16 actions are deprecated. Please update the following actions
to use Node.js 20: actions/cache@v3.0.11. For more information see:
https://github.blog/changelog/
2023-09-22-github-actions-transitioning-from-node-16-to-node-20/
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Fixes a lot of instances of this warning:
Node.js 16 actions are deprecated. Please update the following actions
to use Node.js 20: actions/upload-artifact@v3. For more information see:
https://github.blog/changelog/
2023-09-22-github-actions-transitioning-from-node-16-to-node-20/
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Switch back to main Zephyr repository and commit f9f44b6dcdd.
This includes following squashed SOF commits that are
needed to adapt to HWMv2 changes in Zephyr:
zephyr: app: scripts: intel_adsp: change board names to HWMv2
zephyr: sof: update board name for HWMv2
zephyr: intel_adsp: Change ACE SoC name to HWMv2
app: boards: imx93: updates for zephyr hwmv2
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Update to Zephyr in sof/main-rebase-20240305 branch of SOF
project's clone of Zephyr upstream repository. Revert one
Zephyr commit "pm: Remove CURRENT_CPU macro" that is leading to
failed tests in SOF CI test suite.
The revert allows us to update Zephyr to a newer version and tackle the
SMP boot and cache interface changes in SOF. The latest Zephyr upstream
has further changes needed in SOF for platform configuration and these
will require separarate changes.
Link: https://github.com/thesofproject/sof/issues/8818
Link: https://github.com/zephyrproject-rtos/zephyr/issues/69807
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Zephyr commit b985442829dd ("dts: mimx93_evk_a55: avoid conflict
with Ethos-U NPU reserved memory") changes SRAM0's address to
0xd0000000. This breaks the i.MX93 SOF build because the SRAM0
node is no longer deleted so west build complains about having
2 SRAM0 nodes with different addresses.
To fix this, update the deleted node's base address.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
z_soc_uncached_ptr() / z_soc_cached_ptr() have been removed from
Zephyr and replaced with sys_cache_uncached_ptr_get() and
sys_cache_cached_ptr_get() respectively.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This changes the secondary core power up routine to use the newly
introduced k_smp_cpu_start() and k_smp_cpu_resume(). This removes
the need to mirror part of the SMP start up code from Zephyr, and
no longer need to call into Zephyr private kernel code.
West update includes :
eefaeee061c8 kernel: smp: introduce k_smp_cpu_resume
042cb6ac4e00 soc: intel_adsp: enable DfTTS-based time stamping
on ACE platforms
6a0b1da158a4 soc: intel_adsp: call framework callback function for restore
e7217925c93e ace: use a 'switch' statement in pm_state_set()
c99a604bbf2c ace: remove superfluous variable initialisation
a0ac2faf9bde intel_adsp: ace: enable power domain
4204ca9bcb3f ace: fix DSP panic during startup (fixes c3a6274bf5e4)
d4b0273ab0c4 cmake: sparse.template: add COMMAND_ERROR_IS_FATAL
ca12fd13c6d3 xtensa: intel_adsp: fix a cache handling error
0ee1e28a2f5f xtensa: polish doxygen and add to missing doc
035c8d8ceb4b xtensa: remove sys_define_gpr_with_alias()
a64eec6aaeec xtensa: remove XTENSA_ERR_NORET
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Rander Wang <rander.wang@intel.com>
[guennadi.liakhovetski@linux.intel.com: update Zephyr hversion]
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Since there is no NHLT blob included to these topologies, the same
topology works for all HDA platforms, e.g. TGL, MTL, LNL.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Remove current tests for vmh api. To be replaced by
new implementation.
Old implementation is not parametrized and only checks one scenario:
create heap and allocate on it.
New implementation will cover multiple heap creation, multiple allocations,
checking allocated memory for physical page allocation among other
scenarios.
Remove whole implementation since there is no code reuse.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
Boot tests were dependent on ipc. Change to run theme as part of
zephyr boot process.
Calls to zephyr api were deprecated and would not build with current
zephyr version. Update the call.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
In Zephyr, L3_HEAP is available in `intel_ace15_mtpm/adsp_memory.h` and
`intel_ace20_lnl/adsp_memory.h` but not in `intel_tgl_adsp/adsp_memory.h`
Don't allow configuration that can't possible compile.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Clean up an incorrect TODO comment in the power management runtime
policy.
The removed comment suggested the need for substates to handle cases where
power gating (PG) is enabled and clock gating (CG) is disabled. However,
this is not accurate because:
- Enabling PG when CG is not allowed is not feasible; entering PG could
inadvertently gate the clock even if CG prevent is active.
- Substates are no longer required as clock gating is now always enabled.
This change clarifies the power management behavior and removes confusion
around the handling of power and clock gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
modules_init() already has a "dev" variable, no need to re-calculate
it repeatedly.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
There was no need to use the external "timeout" command + some
complicated exit code logic, libFuzzer has that feature built-in. Switch
to it and delete a few good line.
Add an option to use the built-in, concurrent -jobs feature which saves
a massive amount of time. It has some quirks so do not enable it by
default.
Decrease verbosity by default.
Add in the help message the magic replay command that saves a ton of time.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>