Commit Graph

94 Commits

Author SHA1 Message Date
Marc Herbert 9e080af371 app/sample.yml: add MTL and LNL to Zephyr CI
This will catch earlier compile-time regressions like this one:
https://github.com/zephyrproject-rtos/zephyr/pull/61166#issuecomment-1789717233

Zephyr commit 06cfbd4159fd ("drivers: power_domain: Introduce a gpio
monitor driver")

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-11-03 18:25:54 +02:00
Marc Herbert ba2cfe3daa app/stub*.conf: add CONFIG_SAMPLE_SMART_AMP=y
While one smart_amp C file does not compile, let's keep compile-checking
the other two.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-11-02 12:49:08 +02:00
Pin-chih Lin d4d0a0ca13 smart_amp: fix code and re-enable it on stub builds
Removes the misplaced code in smart_amp.c for the fix, then
re-enables CONFIG_COMP_SMART_AMP on building stub images.

Signed-off-by: Pin-chih Lin <johnylin@google.com>
2023-11-01 20:43:46 +02:00
Marc Herbert 6458f48471 scripts/fuzz.sh: fix multiple issues with "stub" overlays
Fixes commit deed9a8808 ("scripts: fuzz: add support for build and
overlays")

The main issue was the way fuzz.sh was trying to parse the overlay
file. Drop that and just pass it as is to `west` and `cmake` instead,
they know what to do with it.

Also:

- Fix invalid syntax in stub_build_all_ipc4.conf
- Make fuzz.sh shellcheck-clean again. Always use shellcheck.
- Temporarily disable `CONFIG_COMP_SMART_AMP` in
  stub_build_all_ipc3.conf because `smart_amp.c` does not compile (in
  any configuration)

```
sof/src/audio/smart_amp/smart_amp.c:748:9: error:
   no member named 'in_channels' in 'struct smart_amp_data'
   sad->in_channels = audio_stream_get_channels(&source_buffer->stream);
```

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-10-31 14:23:26 +00:00
Fabiola Kwasowiec 90fef5afd2 src_lite: add module
Addition of SRC Lite module,
which only supports a subset of conversions
supported by the SRC module.

Purpose of SRC Lite module is memory optimization.
Code of SRC Lite is drastically reduced and requires
significantly less memory. When needed one of
defined conversions, driver can choose SRC Lite
module instead of SRC module to optimize memory utilization.

48 -> 16kHz
44.1 -> 16 kHz
32 -> 16 kHz
44.1 -> 48

Signed-off-by: Fabiola Kwasowiec <fabiola.kwasowiec@intel.com>
2023-10-26 17:08:29 +03:00
Jaroslaw Stelter 8be15f5469 lnl: Fix KD topology tests failure
KD topology tests fail on LNL due to insufficient size of
heap memory. During creation of KD topologies with
4ch audio format, FW fails on memory allocation.
The patch increases HEAPMEM size.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-10-25 16:49:09 +01:00
Kai Vehmanen f8a202aa92 app: boards: intel_adsp_ace20_lnl: drop DMA_DW_SUSPEND_DRAIN
The LNL board does not use DMA_DW driver, so the board
file should not set any build options specific to that
driver.

This fixes build warning:

--cut--
warning: DMA_DW_SUSPEND_DRAIN (defined at
drivers/dma/Kconfig.dw_common:27, drivers/dma/Kconfig.dw_common:27,
drivers/dma/Kconfig.dw_common:27) was assigned the value 'y' but got the
value 'n'.
---cut--

Link: https://github.com/thesofproject/sof/issues/8356
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-10-24 20:29:58 +03:00
Seppo Ingalsuo 76754b52d0 App: Intel: Enable Aria build for TGL and TGL-H platforms
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-10-20 12:35:53 +03:00
Baofeng Tian 56dae244ae audio: perf: enable dsp clock for performance measurement
previously, performance measurement based on platform clock, source
clock is 38.4mhz, for better align with CPC calculation, change
clock to dsp clock, this will be done through enable config:
CONFIG_TIMING_FUNCTIONS, and this config only be used with perf_cnt
header file, so this change only have impact on performance build.

Signed-off-by: Baofeng Tian <baofeng.tian@intel.com>
2023-10-18 15:57:55 +03:00
Tomasz Leman 5b8ba30694 ace: overlay: update clock frequency
Changing max clock frequency for FPGA configuration.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-28 07:53:37 +02:00
Marc Herbert 0061953a59 .github/sparse-zephyr: add -DCONFIG_MINIMAL_LIBC to avoid picolibc
Add a sparse-specific workaround for the incompatibility with
picolibc (the new Zephyr default)
https://github.com/zephyrproject-rtos/zephyr/issues/63003

Also fix comment in commit 2a9473a17b ("app/prj.conf: disable PICOLIBC
with CONFIG_MINIMAL_LIBC=y"): we don't need to disable PICOLIBC
_everywhere_; we only need to disable it when using sparse.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-09-27 14:00:10 +01:00
Marc Herbert 2a9473a17b app/prj.conf: disable PICOLIBC with CONFIG_MINIMAL_LIBC=y
Starting from Zephyr commit f0daf904bb02, CONFIG_PICOLIBC is on by
default.

PICOLIBC does not seem compatible with sparse yet:
https://github.com/zephyrproject-rtos/zephyr/issues/63003

Even if it were compatible with sparse, it seems like a pretty big
change that we should not immediately and blindly accept.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-09-25 15:04:17 +03:00
Chao Song b0afa39126 app: overlays: remove tgl and tgl-h ipc4 overlays
We build tgl and tgl-h with ipc4 by default, those
ipc4 overlays are empty now, can be removed safely.

Signed-off-by: Chao Song <chao.song@linux.intel.com>
2023-09-21 11:00:12 +03:00
Jakub Dabek 1721f70426 logging: add logging through probes
Logging with probes was not implemented. This implements
ipc that enables logging with probe configuration.

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2023-09-15 12:57:07 +03:00
Seppo Ingalsuo f114acecb1 Audio: Kconfig: Deprecate tone component
Tone component has been without maintenance and validation,
and there is no interface to control sound generation from
user space so it will be deprecated and removed from successive
release.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-09-11 15:57:30 +01:00
Marc Herbert 178f561b6e Revert "app/prj.conf: restore CONFIG_CLEANUP_INTERMEDIATE_FILES=n default"
This reverts commit 80c6738b89.

The Zephyr default changed in commit 385ad46a39ca so this is not needed
anymore.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-08-31 11:37:01 +03:00
Seppo Ingalsuo 8d01ad69a7 Kconfig: Enable crossover and multiband-DRC by default
This patch enables for TGL and MTL platforms as default
to enable CI build tests, etc.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-08-30 16:01:59 +01:00
Kai Vehmanen 59028ad3d1 drivers: Intel: remove Intel XTOS drivers
Now that Intel cAVS2.5 has been migrated to use native Zephyr
drivers, we have no need to keep the Intel specific XTOS
drivers in the tree anymore.

Adjust board configuration files to not refer to removed
Kconfig options.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-21 12:21:55 +03:00
Kai Vehmanen 9948d439d9 app: Intel: switch cAVS2.5 configs to use IPC4 by default
The IPC3 build is no longer supported for Intel cAVS2.5 target,
so move the config overlay definitions as-is to the main
board config file.

To smoothen the transition, keep an empty IPC4 overlay file
in the tree to allow developers to update build scripts.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-21 12:21:55 +03:00
Peter Ujfalusi 3a17cde8fc board: intel_adsp_cavs25_tglh: Enable support for library loading
Add the needed config options to enable the library loading support.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-08-17 13:28:11 +01:00
Peter Ujfalusi b42bbcaed7 board: intel_adsp_cavs25: Enable support for library loading
Add the needed config options to enable the library loading support.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-08-17 13:28:11 +01:00
Serhiy Katsyuba 81bccef08d app: Enable probe for MTL
Enables extraction and injection probes for MTL platform.
NOTE: this commit does NOT enable probe log backend.

Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2023-08-16 21:21:55 +03:00
Kai Vehmanen 8f6018057b app: enable OUTPUT_DISASSEMBLY for Zephyr builds
With Zephyr commit cc5763344709 ("Build system: disable
`OUTPUT_DISASSEMBLY` by default"), generation of zephyr.lst
is disabled by default.

Enable disassembly generation in SOF configuration as it is expected by
SOF builds rules for reproducible builds.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-15 10:48:38 +03:00
Curtis Malainey 1a89639cf0 ci: Add build all config
Utilize the posix build so that as many components as possible can be
built at once. Also build a bunch of `default n` components as well.

Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
2023-07-26 13:31:36 +01:00
Seppo Ingalsuo 619477a186 App: Overlays: Add DRC component build to TGL, TGL-H, ACE
This patch adds CONFIG_COMP_DRC=y for IPC4 Intel platform
builds.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-07-25 15:48:08 +01:00
Peter Ujfalusi 1411dd6607 board: intel_adsp_cavs25_tglh: Disable DTRACE
DTRACE is IPC3 only, it is not used anymore.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-07-20 12:12:46 +03:00
Peter Ujfalusi df5576872f board: intel_adsp_cavs25: Disable DTRACE
DTRACE is IPC3 only, it is not used anymore.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-07-20 12:12:46 +03:00
Jaroslaw Stelter 83343c51bb lnl: app: Fix configuration for D3 flow
LNL configuration must be updated to fix D3 flow
on ACE 2.0 platform.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-07-07 15:49:36 +01:00
Kai Vehmanen 3fef488d8f app: add logging_mipisystcat_overlay.conf overlay config
Add an overlay config to build SOF with MIPI Sys-T Catalog
logging enabled.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-07-03 16:11:22 +01:00
Andrey Borisovich 965e1c1bf0 board: intel_adsp_ace15_mtpm: Enabled MTL IMR context save
Enabled CONFIG_ADSP_IMR_CONTEXT_SAVE option in Kconfig
in the board configuration.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-06-28 15:32:16 +03:00
Andrey Borisovich 80f27b2f7e board: intel_adsp_ace15_mtpm: disabled CONFIG_PM_DEVICE_RUNTIME_EXCLUSIVE
Zephyr turns on by default CONFIG_PM_DEVICE_RUNTIME_EXCLUSIVE option
what causes Devices using Zephyr Device System Power Manager to
be ignored during SoC power transition. Disabled this option so we
can use default Zephyr kernel behavior to shut down Devices.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-06-28 15:32:16 +03:00
Daniel Baluta 20f064749a app: boards: Remove mimx93_evk_a55_sof.conf file
We now use mimx93_evk_a55 board so there is no longer
need for mimx93_evk_a55_sof.conf.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2023-06-21 13:13:11 +03:00
Daniel Baluta c42613afd7 app: boards: Add mimx93_evk_a55 config fragment
We plan to get rid of mimx93_evk_a55_sof board and use the
generic mimx93_evk_a55 board + overlays.

This patch adds the config fragment to enable mimx93_evk_a55 board for
SOF.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2023-06-21 13:13:11 +03:00
Daniel Baluta ff71cf89b1 app: boards: Add mimx93_evk_a55 overlay file
We will use SOF app with default mimx93_evk_a55 board on top
of which will add necessary adaptations.

e.g we will define SOF required memory areas in the overlay
and will get rid of mimx93_evk_a55_sof board.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2023-06-21 13:13:11 +03:00
Chao Song 249f9dc68f app: configs: fix inconsistent logging config
The config CONFIG_LOG_FUNC_NAME_PREFIX_xxx is only
enabled for ACE platforms and INF log level, and the
timestamp used is different on TGL and MTL, which
is not quite consistent.

This patch make sure the log format is consistent
among platforms and log levels.

Signed-off-by: Chao Song <chao.song@linux.intel.com>
2023-06-15 16:32:52 +03:00
Rander Wang cb605a44ce zephyr: enable core dump on MTL platform
Follow the setting on TGL platforms.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-06-06 17:39:58 +03:00
Rander Wang 7a7dfb810d zephyr: enable core dump on tgl platforms
We need to enable CONFIG_DEBUG_COREDUMP_MEMORY_DUMP_MIN according to
comments in coredump_core.c: When dumping minimum information, the
current thread struct and stack need to be dumped so debugger can
examine them.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2023-06-06 17:39:58 +03:00
Marc Herbert 80c6738b89 app/prj.conf: restore the CONFIG_CLEANUP_INTERMEDIATE_FILES=n default
Zephyr has hardcoded this to 'y' because it saves CI some disk space
when compiling hundreds of different zephyr/tests/, each in a separate
build directory. But when compiling just one "sof/app" it saves
practically no space, breaks the incremental build and can make it more
difficult to troubleshoot some build issues. So, reset it to the default
value.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-06-02 13:07:34 +03:00
Jaroslaw Stelter 02635875fb lnl: Lunarlake configuration
Add initial LNL configuration.
Enable building for xt-clang.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-05-24 18:52:53 +03:00
Keith Packard 3a5f7a3d2d app: Switch main return type to 'int'
With Zephyr adopting a different type for 'main', adapt this
application to match.

Signed-off-by: Keith Packard <keithp@keithp.com>
2023-05-04 16:45:32 +03:00
Laurentiu Mihalcea aff453e4c8 app: boards: Add new board configuration for i.MX93
This commit introduces a new board configuration for i.MX93.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-04-25 13:04:58 +03:00
Anas Nashif 9f813a3641 app: remove old cavs platforms
Remove old platforms from zephyr testcase file:

- intel_adsp_cavs15
- intel_adsp_cavs18
- intel_adsp_cavs20

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-10 16:23:59 +03:00
Jaska Uimonen e9cfb64f0d zephyr: cavs: use zephyr pm, clk and dma glue
Start using zephyr pm_runtime, clk and dma glue code in cavs25 native
drivers build. Move the files from ace/lib into zephyr/lib.

Also update west.yaml to related zephyr commit as power related
files have been moved to zephyr side.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2023-03-27 12:37:26 +03:00
Ranjani Sridharan 56abcade56 boards: intel_adsp_ace15_mtpm: Enable dw_dma_suspend_drain for ACE
It is recommended to suspend and drain before stop.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2023-03-17 16:06:06 +00:00
Guennadi Liakhovetski 2d8ad0c25a tgl: remove deprecated and unused overlay
The ipc4_native_drivers_overlay.conf overlay is deprecated and isn't
used any more, the default ipc4_overlay.conf configures native
drivers itself. Remove the deprecated version.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2023-03-17 09:02:06 +02:00
Marcin Szkudlinski 62e358231e kconfig: add DP_SCHEDULER kconfig def
some platforms don't use Zephyr, therefore they can't
use DP scheduler. Add a config option

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2023-03-14 14:00:28 +00:00
Przemyslaw Blaszkowski 85367b73b9 mtl: add Aria module to build
Add Aria module to MTL build.

Signed-off-by: Przemyslaw Blaszkowski <przemyslaw.blaszkowski@intel.com>
2023-03-09 13:54:32 +00:00
Adrian Bonislawski d7da25fc25 platform: ace: enable Zephyr counter drivers
This will allow to build and enable ace art and rtc
counter drivers

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2023-03-08 14:36:57 +00:00
Guennadi Liakhovetski b637889efb platform: remove support for cAVS 2.0 platforms
Remove all support for cAVS 2.0 platformsm including Ice Lake and
Jasper Lake, they aren't supported any more.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2023-03-07 14:02:18 +02:00
Marc Herbert 157fd098cc app/CMakeLists.txt: require cmake version 3.21.0 or above
In version 3.21, CMake made a change that links .c.obj files in a order
different from 3.20. This makes different CMake versions generate a
different final image and breaks build reproducibility.

No such change between 3.21 and 3.25.2

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-03-06 13:05:05 +02:00