Commit Graph

8 Commits

Author SHA1 Message Date
Guennadi Liakhovetski f86ad4fa20 eq-iir: convert to a loadable module
Build eq-iir as a loadable llext module.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2024-05-14 14:37:44 +01:00
Guennadi Liakhovetski 753e363f0f mixin-mixout: make modular
Convert mixin-mixout to a loadable llext module.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2024-05-14 14:37:44 +01:00
Guennadi Liakhovetski 980b1c64f2 smart-amp-test: make a loadable module
Convert the smart-amp-test in its IPC4 version to a loadable LLEXT
module. Use an overlay configuration to select between monolithic and
modular builds.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2024-03-08 16:25:28 +02:00
Johny Lin 1233a220b1 overlays: dts: use prebuilt library for production
DTS codec targets the integration on sof-mtl-rt5650-dts.tplg. The
firmware build config should not set COMP_STUBS. At the same time the
config GOOGLE_RTC_PROCESSING_MOCK should be enabled as since its
libraries are still WIP.

Signed-off-by: Pin-chih Lin <johnylin@google.com>
2024-02-19 14:32:12 +00:00
Joe Cheng a8db157b9a app: overlays: Add DTS support to MTL
This patch adds DTS_CODEC for IPC4 Intel platform builds.

Since EQ IIR + DTS is the combination we use to support customer, adding
EQ IIR here to ensure it's enabled.

Signed-off-by: Joe Cheng <joe.cheng@xperi.com>
2023-11-14 08:20:54 -08:00
Tomasz Leman 5b8ba30694 ace: overlay: update clock frequency
Changing max clock frequency for FPGA configuration.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-09-28 07:53:37 +02:00
Adrian Warecki 447b365b62 mtl: board: Update mtl board configuration
Necessary configuration options of the mtl board
have been enabled.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2022-10-18 16:10:37 +03:00
Adrian Warecki d5967d1913 platform: mtl: Add meteorlake plaftom
Added base files of meteorlake plaftom:
  Board configuration
  CPU, clock and memory configuration
  Platform bootstrap code
  IPC driver wrapper for Zephyr IPC API for ACE1.5 platforms.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2022-09-21 15:15:26 +02:00