Commit Graph

20 Commits

Author SHA1 Message Date
Seppo Ingalsuo 5af59eb5cc Tools: Tplg_parser: Add include of <linux/types.h>
These headers include alsa/sound/asoc.h and some versions of the
headers have this conditional include of types.h:

	#if defined(__linux__)
	#include <linux/types.h>
	#endif

To ensure types __le64, __le32, __le16, __u8 are defined explicitly
include types.h becore including asoc.h.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-05-15 11:49:43 +03:00
Seppo Ingalsuo a380d21d85 Tools: Testbench: Fixes for xt-xcc build and cycles counting
This patch avoids the build errors. Most of the issues are
from different types for formatted printing in gcc vs. xt-xcc.

The "__attribute__ ((fallthrough));" is not supported in xt-xcc.

The xtensa C library does not have clock_gettime() so it is
only left out from build. The cycles count and MCPS is printed
instead.

The include of dlfcn.h is not needed since the testbench no
more has dynamic libraries.

Structs within structs need to be initialized to zero in xt-xcc
with multiple brackets.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-05-04 18:07:52 +03:00
Liam Girdwood 968e0404ed tools: tplg_parser: abstract topology APIs in preparation for IPC4
Abstract the topology APIs to provide support for other IPC ABIs and
further simplify the codebase. Makse sure all public APIs have the tplg
prefix and make sure private APIs are in the correct places.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2023-03-30 11:42:42 +01:00
Seppo Ingalsuo e0d8078fa7 Tools: Testbench: Avoid need linux kernel headers in build
This patch adds simplified linux/types.h into testbench headers
to enable include of ALSA asoc.h to build without other difficult
kernel headers content.

The CMakeLists.txt files are updated to make a build time copy of
asoc.h to subdirectory include of the build directories. The new
directory is added to headers path.

This change avoids build fail with xcc toolchain that can't use the
gcc toolchain headers from the system where the ALSA headers are
located.

Suggested-by: Marc Herbert <marc.herbert@intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-03-20 19:33:55 +02:00
Liam Girdwood ce37e802f4 tools: tplg_parser: parse topology in memory and not in file.
Reduce complexity by parsing all topology objects in memory rather than
by seeking file, reading into allocated memory and then freeing memory.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2023-03-15 13:23:42 +00:00
Liam Girdwood d9f9340e1a tplg_parser: split out testbench logic and partition features per file.
This is another tplg_parser and testbench update on the road to provide
further flexibility around supporting new modules and IPC versions.
There will more to follow.

Changes are mostly mechanical code movements i.e. moving testbench related code
to the testbench, splitting the files into per module/component files and
making some functions static and public.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2022-08-29 14:11:29 +01:00
Ranjani Sridharan c40743ec8d testbench: add support for parsing UUID
In preparation for comverting the volume component to use the module
interface, add support for parsing the UUID from topology when parsing
the PGA widget in testbench.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2022-06-10 09:50:08 +01:00
Liam Girdwood 0db4a82964 tplg parser: refactor and cleanup part 1
No functional change.

Move some common testbench code into the topology parser and group
feature parsing by file name.

Add a tplg_ prefix to external APIs without a prefix, others with an
existing prefix to follow this change.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2022-03-24 16:54:40 +00:00
Liam Girdwood 0cec50a976 testbench: further refactor of per pipeline data
The testbench currently has a global structure that contains
per topology and per pipeline data. Refactor to move data to the
most appropriate structure for use.

This is not the final fix, further refactoring is needed.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2022-02-08 10:43:18 +00:00
Liam Girdwood 28761ec8ab testbench: add support for virtual cores as threads
This is the first step in running a full DSP topology on multiple testbench
"virtual" cores. Testbench will use threads to virtualise a emulate a core
allowing topologies with more than one core to run simultaneously.

This patch makes the following changes.

1) Adds and passes a topology testbench context to all APIs instead of
   relying on some globals.

2) Splits the testbench up into small functions that have a single purpose.

3) Creates a thread for each pipeline which in turn share a virtual core.

4) Adds the command line options to enable testing different cores and
   pipelines.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2022-01-31 16:16:27 +00:00
Jaska Uimonen a44946b8ba tools: tplg_parser: add uuid token parsing
Add parsing methods for UUID tokens.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2020-09-07 12:04:28 +01:00
Mohana Datta Yelugoti 782d4ce3fd testbench: check array size mismatch while loading topology buffer
This patch uses the functionality added by the c9e090c commit
to check for array size mismatch while loading topology
buffer.

Signed-off-by: Mohana Datta Yelugoti <ymdatta.work@gmail.com>
2020-08-18 10:36:41 +01:00
Mohana Datta Yelugoti d9712ef671 testbench: topology:check array size mismatch in filewrite component
This patch uses the functionality added by the c9e090ccf3 commit
to check for array size mismatch in components.

Since, the components are in places other than tplg_parser, the
function which checks for the mismatch has been made an external
function from a static one. The function declaration has been
added to the tplg_parser header files, so that the function can
be used by any code which needs array size checks in components.

Signed-off-by: Mohana Datta Yelugoti <ymdatta.work@gmail.com>
2020-08-18 10:36:41 +01:00
Seppo Ingalsuo fa4a7bda4e Testbench: Check num_elems in tokens parsing
This patch adds check for sane num_elems value. If the calculated
array size exceeds the value size an error is returned and topology
parsing is aborted.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2020-08-04 11:25:35 +01:00
Seppo Ingalsuo c614ed38bb Testbench: Parse all buffer widget vendor arrays
In some topologies there is a component tokens array after buffer
tokens array for buffer widget. Since the earlier code version was
able to handle only single array and did not skip the remaining it
caused the remaining topology parsing to go out of sync and fail.

This patch changes the vendor array parsing to be similar as for PCM
widget that already had capability to handle several arrays. The core
id is retrieved if present in topology and passed via IPC.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2020-05-07 17:33:07 +01:00
Sebastiano Carlucci 60fc730003 tools: testbench: Include dcblock in testbench
This commit adds support for running test for dc blocker.

Signed-off-by: Sebastiano Carlucci <scarlucci@google.com>
2020-03-26 16:49:37 +00:00
Seppo Ingalsuo 0eeda80bdf Testbench: Add processing component load
This patch adds to testbench capability to run pipelines with EQ_IIR
and EQ_FIR components. The component is configured with the topology
embedded configuration blob when instantiated with new().

The load of volume component has been enhanced to parse volume tokens and
compute the min and max volume parameters.

The topology parsing and component library load has been changed to
support processing component load and extracting of control private
data. The testbench build has been changed to create libraries
for EQ components.

The testbench command line parsing has been improved to return
error for invalid library request.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2020-03-20 13:29:00 +00:00
Seppo Ingalsuo 0bce9e4f36 Testbench: Instantiate file component as host or DAI and other updates
This patch fixes the fail to execute tests due to recent pipeline
updates. Now the fileread and filewrite component is instantiated
as host or DAI depending on stream direction. The DAI file component
is added the capability to report HW stream parameters. In testbench
case the stream parameters originate from command line parameters.

The file params() handling is updated to be similar as in other
components to successfully propagate the parameters.

The added capture pipelines support is not fully functional and will
be fixed later.

The testbench cleanup includes elimination of global variables for
certain component ids. The needed misc parameters were added to
testbench parameters struct that is passed through most topology
parsing functions.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2020-02-26 22:29:10 +00:00
Seppo Ingalsuo c9bf3dc15a ASRC: Add ASRC into testbench
This patch adds the ASRC component and the new tokens into topology
parser and testbench component loader.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2019-11-27 09:49:48 +00:00
Ranjani Sridharan c8b39dc9d6 testbench: Support reuse of topology parser
The topology parser in testbench can be re-used for
the other applications like the fuzzer. In order to
accomplish this, this commit does the following:
1. Separate the topology parser into a separate project
(tplg_parser) which implements the callbacks for parsing
all the components in topology.
2. Add support for parsing new components such as host
pcm, dai and mixer
3. Include the topology parser as an external project
in the testbench.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
2019-08-07 08:47:58 +02:00