Some of the IPC4 HW_CONFIG fields are platform specific and cannot be
filled with generic code.
Handle this functionality by separating platform specific parts of
base_fw to a new base_fw_platform.h interface. Move out existing code
for Intel cAVS and ACE platforms. Add a new stub implementation for
posix platform. This posix stub can be also used as a starting point
when adding IPC4 support to new platforms.
This platform construct can be later used to move out other
vendor and platform data out from base_fw.c.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
For Zephyr builds, only definition needed from platform/drivers/idc.h
was prototype for idc_send_msg(). There's no need to keep the platform
layer just for this, so add the definition to rtos/idc.h for Zephyr
builds, and remove the platform/drivers/idc.h for all Intel platforms.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The interrupt.h interface is no longer used by any Intel platform
as all drivers have been replaced with native Zephyr drivers, so these
definitions are no longer needed.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Introduces telemetry structure into debug memory window. Adds
systick_info which counts execution time of LL tasks. DP tasks are not
supported yet.
Signed-off-by: Tobiasz Dryjanski <tobiaszx.dryjanski@intel.com>
Contains the following squashed SOF commits:
nxp: imx8ulp: change SOC name to MIMX8UD7
zephyr: CMakeLists.txt use new `CONFIG_SOC_C` for 8ULP
cmake: update configs for NXP ADSP
and the following Zephyr patches affecting SOF:
951763939034 nxp: imx8ulp: change SOC name to MIMX8UD7
b8214b673970 dts: xtensa: nxp_imx8: add SAI1 node
a0e32f07ef76 dts: intel_adsp: ace: update host dma copy alignment
3fde2c50c6ef tracing: add intel ADSP memory window backend
6b9d01f995c7 intel_adsp/ace: power: No pending transaction before power gate
6ea749de5283 arch: rename arch_start_cpu() to arch_cpu_start()
b69d2486fee6 kernel: rename Z_KERNEL_STACK_BUFFER to K_KERNEL_STACK_BUFFER
1f55be8b42df nxp: imx8: change CONFIG_SOC_<name> to match the value
688fbb53aeb2 intel_adsp: ace: Fix sparse error
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Starting with this commit, i.MX93 now uses the timer domain
in conjunction with the Zephyr native drivers.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
With the switch to HWMv2, `CONFIG_SOC_SERIES_MIMX9_A55`
has been renamed to `CONFIG_SOC_MIMX9352_A55` so make sure
we also use the correct name when fetching the driver structure
associated with 93's DMACs.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Since the EDMA and HOST DMA nodes have been introduced to
the i.MX93 overlay, add entries in the dma array which will
create a struct dma for each of these DMACs.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Convert the smart-amp-test in its IPC4 version to a loadable LLEXT
module. Use an overlay configuration to select between monolithic and
modular builds.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Switch back to main Zephyr repository and commit f9f44b6dcdd.
This includes following squashed SOF commits that are
needed to adapt to HWMv2 changes in Zephyr:
zephyr: app: scripts: intel_adsp: change board names to HWMv2
zephyr: sof: update board name for HWMv2
zephyr: intel_adsp: Change ACE SoC name to HWMv2
app: boards: imx93: updates for zephyr hwmv2
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
z_soc_uncached_ptr() / z_soc_cached_ptr() have been removed from
Zephyr and replaced with sys_cache_uncached_ptr_get() and
sys_cache_cached_ptr_get() respectively.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This changes the secondary core power up routine to use the newly
introduced k_smp_cpu_start() and k_smp_cpu_resume(). This removes
the need to mirror part of the SMP start up code from Zephyr, and
no longer need to call into Zephyr private kernel code.
West update includes :
eefaeee061c8 kernel: smp: introduce k_smp_cpu_resume
042cb6ac4e00 soc: intel_adsp: enable DfTTS-based time stamping
on ACE platforms
6a0b1da158a4 soc: intel_adsp: call framework callback function for restore
e7217925c93e ace: use a 'switch' statement in pm_state_set()
c99a604bbf2c ace: remove superfluous variable initialisation
a0ac2faf9bde intel_adsp: ace: enable power domain
4204ca9bcb3f ace: fix DSP panic during startup (fixes c3a6274bf5e4)
d4b0273ab0c4 cmake: sparse.template: add COMMAND_ERROR_IS_FATAL
ca12fd13c6d3 xtensa: intel_adsp: fix a cache handling error
0ee1e28a2f5f xtensa: polish doxygen and add to missing doc
035c8d8ceb4b xtensa: remove sys_define_gpr_with_alias()
a64eec6aaeec xtensa: remove XTENSA_ERR_NORET
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Rander Wang <rander.wang@intel.com>
[guennadi.liakhovetski@linux.intel.com: update Zephyr hversion]
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Remove current tests for vmh api. To be replaced by
new implementation.
Old implementation is not parametrized and only checks one scenario:
create heap and allocate on it.
New implementation will cover multiple heap creation, multiple allocations,
checking allocated memory for physical page allocation among other
scenarios.
Remove whole implementation since there is no code reuse.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
Boot tests were dependent on ipc. Change to run theme as part of
zephyr boot process.
Calls to zephyr api were deprecated and would not build with current
zephyr version. Update the call.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
Clean up an incorrect TODO comment in the power management runtime
policy.
The removed comment suggested the need for substates to handle cases where
power gating (PG) is enabled and clock gating (CG) is disabled. However,
this is not accurate because:
- Enabling PG when CG is not allowed is not feasible; entering PG could
inadvertently gate the clock even if CG prevent is active.
- Substates are no longer required as clock gating is now always enabled.
This change clarifies the power management behavior and removes confusion
around the handling of power and clock gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Allocation sizes were calculated with faulty logic. Bits to check
size calculation is not needed since array position was calculated
and loop should go from this position to array end.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
When allocating non contiguously if exact block size was allocated on
given physical allocator it would fail. Fix logic to include
that event.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
As discussed in the alternative approach
https://github.com/zephyrproject-rtos/zephyr/pull/68494/, k_panic() in
POSIX mode has various shortcomings that do not provide a useful
trace. Useless pointers to signal handlers or other cleanup routines are
printed instead. Leverage our already existing
k_sys_fatal_error_handler() and dereference a NULL pointer there when in
POSIX mode. This "fails fast" and provides a complete and relevant stack
trace in CI when fuzzing or when using some other static
analyzer. Example of how fuzzing failure #8832 would have looked like in
CI results thanks to this commit:
```
./build-fuzz/zephyr/zephyr.exe: Running 1 inputs 1 time(s) each.
Running: ./rballoc_align_fuzz_crash
*** Booting Zephyr OS build zephyr-v3.5.0-3971-ge07de4e0a167 ***
[00:00:00.000,000] <inf> main: SOF on native_posix
[00:00:00.000,000] <inf> main: SOF initialized
@ WEST_TOPDIR/sof/zephyr/lib/alloc.c:391
[00:00:00.000,000] <err> os: >>> ZEPHYR FATAL ERROR 4: Kernel panic
[00:00:00.000,000] <err> os: Current thread: 0x891f8a0 (unknown)
[00:00:00.000,000] <err> zephyr: Halting emulation
AddressSanitizer:DEADLYSIGNAL
=================================================================
==1784402==ERROR: AddressSanitizer: SEGV on unknown address 0x00000000
==1784402==The signal is caused by a WRITE memory access.
==1784402==Hint: address points to the zero page.
#0 0x829a77d in k_sys_fatal_error_handler zephyr/wrapper.c:352:19
#1 0x829b8c0 in rballoc_align zephyr/lib/alloc.c:391:3
#2 0x8281438 in buffer_alloc src/audio/buffer.c:58:16
#3 0x826a60a in buffer_new src/ipc/ipc-helper.c:48:11
#4 0x8262107 in ipc_buffer_new src/ipc/ipc3/helper.c:459:11
#5 0x825944d in ipc_glb_tplg_buffer_new src/ipc/ipc3/handler.c:1305:8
#6 0x8257036 in ipc_cmd src/ipc/ipc3/handler.c:1651:9
#7 0x8272e59 in ipc_platform_do_cmd src/platform/posix/ipc.c:162:2
#8 0x826a2ac in ipc_do_cmd src/ipc/ipc-common.c:328:9
#9 0x829b0ab in task_run zephyr/include/rtos/task.h:94:9
#10 0x829abd8 in edf_work_handler zephyr/edf_schedule.c:32:16
#11 0x83560f7 in work_queue_main zephyr/kernel/work.c:688:3
#12 0x82244c2 in z_thread_entry zephyr/lib/os/thread_entry.c:48:2
```
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Add HiFi5 implementation of mix functions, compared with
HiFi3 version, can reduce about 27% cycles.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Keep timer interrupt handling on the primary core, this avoids
secondary cores failing to handle timer interrupts immediately after
power on.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Replace a potentially infinite loop with one, using a retry counter
to avoid lock ups.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Fixes the commit f4d043724d ("Audio: Move components related config
to subfolder").
Due to a copy/paste error, the content of mixin_mixout/Kconfig has
been a copy of aria/Kconfig. This patch fixes the copy/paste error,
and adds IPC version dependence for COMP_MIXER and COMP_MIXIN_MIXOUT.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Pure comment change, no code change.
Kudos to Stephanos Ioannidis for patiently explaining this to me on
Discord.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
For rballoc_allign() call when caps are not correct it is
enough to return error. k_panic() call is not required here.
Previous change exposed this issue:
https://github.com/thesofproject/sof/issues/8832,
but it is sufficient to log error and return NULL at this point.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
L3_HEAP is used in library manager for library storage buffer allocation
and in D3 enter/exit flows to allocate IMR context storage buffer.
Both buffers should be aligned so use rballoc_align() routine to get
correctly aligned buffers.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This patch implements recommended hardware flow for
Intel ACE platforms.
The L3 heap should be accessed via cached pointers
including management data.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
NXP's i.MX8 and Intel's CAVS are the only platforms using
Zephyr that also require the usage of drivers/interrupt.h. Since
for i.MX8 platforms drivers/interrupt.h is included through
xtos/rtos/interrupt.h, add a macro guard around the inclusion of
drivers/interrupt.h which will allow the other Zephyr platforms
(i.e: NXP's i.MX93 and Intel's ACE) to finally remove the SOF-specific
drivers/interrupt.h. This is desired because the platforms should only
rely on the Zephyr interrupt support instead of having to use
a hybrid between Zephyr and SOF interrupt support.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Zephyr and XTOS' rtos/interrupt.h already include
drivers/interrupt.h so there's no need to include it again
in files which make use of one of the two rtos/interrupt.h
headers. As such, this commit removes all drivers/interrupt.h
inclusions from said files.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This forks a slightly earlier version of library loading code for
upcoming LLEXT support.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Add HiFi5 implementation of aria algorithm functions, compared with
HiFi3 version, can reduce about 10% cycles.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Except for trace file, there is no usage for META in sof
source code, posix and xtos are all aligned with zephyr definiton.
Signed-off-by: Baofeng Tian <baofeng.tian@intel.com>
This patch adds function sofm_lut_sin_fixed_16b(). It was
used earlier in SOF with name sin_fixed() but was remove
at add of Cordic trigonometric library. This sine function
can be used in hot code parts. Due to look-up table usage it
consumes more .bss RAM than cordic version.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
In Zephyr CMakeLists, add exponential source files to facilitate
the compilation of math C and HiFi code.
Signed-off-by: shastry <malladi.sastry@intel.com>
Unbreak the Zephyr build when this is enabled, and add the needed bits
to produce a working executable.
This is mostly just a recapitulation of the existing integration,
which means that it's manually pulling in bits from the Cadence
toolchain it needs. SOF isn't yet using the Zephyr C++ integration
(which isn't xt-clang aware yet), nor does it really want to as SOF
itself includes no such code. Zephyr doesn't have a "C++ binary
linkage only" feature yet.
Signed-off-by: Andy Ross <andyross@google.com>
This is a weak stub for the Cadence libc's allocator (which is just a
newlib build). It's traditionally been provided like this in SOF for
the benefit of C++ code where the standard library needs to link to a
working malloc() even if it will never call it.
Longer term this should be integrated as a working allocator, either
unified with the one here or in the Zephyr libc layer. Zephyr already
provides a newlib-compatible _sbrk_r(), we just have to tell it to use
it when linking against Cadence libc.
Signed-off-by: Andy Ross <andyross@google.com>
This is a clean up, purpose is declutter headers, toml files,
Readme.md etc per module basis, since today everything is
scattered in current code base.
Signed-off-by: Baofeng Tian <baofeng.tian@intel.com>
This is a clean up, purpose is de-cluster headers, toml files,
Readme.md etc per module basis, since today everything is
scattered in current code base.
Signed-off-by: Baofeng Tian <baofeng.tian@intel.com>
Test both cases - when spanning multiple blocks is allowed and when
it isn't.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Add a ZTEST test-suite to run SOF boot-time self-tests at the time of
the first FW_GEN_MSG IPC.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Fix the mistake of FIR lib files, we should include FIR math
lib .c files base on CONFIG_MATH_FIR instead of CONFIG_COMP_FIR.
Signed-off-by: Andrula Song <andrula.song@intel.com>
Kai Vehmanen