Commit Graph

5144 Commits

Author SHA1 Message Date
Marcin Maka c5148e8966 ipc: trace: log message size at appropriate level
rx_size > tx->size where static size defined by FW is able
to accommodate the message is something usual and should not
add noise to INFO level.

tx->size > rx_size is something potentially dangerous since
the copy does not contain full data provided by the sender.
It should be logged at WARN level and addressed (cases where
partial copy is useful for anything are rather exceptional
and at this point it is not clear whether the original data
should be preserved and used or could be discarded as in case
where full data is safely copied).

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-16 10:17:32 +03:00
Marcin Maka 2bed67e4be ipc: trace: define macro for warning level
Some IPC traces could be moved to warning level to pay
attention to them.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-16 10:17:32 +03:00
Mohana Datta Yelugoti 0fdfaed6f4 include: common: surround macro argument with parentheses
This commit fixes the warning generated by clang-tidy due to
bugprone macro parentheses. It is recommended to surround macro
arguments in the replacement list with parentheses. This ensures
that the argument value is calculated properly.

Name of the warning generated: bugprone-macro-parentheses

Signed-off-by: Mohana Datta Yelugoti <ymdatta.work@gmail.com>
2020-04-16 10:11:15 +03:00
Daniel Baluta d8899386b6 drivers: imx: sdma: Better isolate channel0
Channel 0 is special. It is used to run other channels. It allows
copying data and instruction to and from SDMA RAM.

For channel 0 there will no be DMA API calls. E.g sdma_start,
sdma_stop etc.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-15 22:37:24 +01:00
Daniel Baluta c377744cae drivers: imx: sdma: Set priority for channel 0
Channel 0 shouldn't be touched by DMA API functions.
Thus its priority needs to be set in sdma_init_c0.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-15 22:37:24 +01:00
Daniel Baluta 5b39ee1d3f drivers: imx: sdma: Introduce sdma_enable_channel
sdma_start shouldn't be used to enable channel 0. We will reserve
dma_ops to only work on data channels.

For now introduce sdma_enable_channel that will take care of
starting a channel.

Replace internal usage of sdma_start from sdma_run_c0 with
sdma_enable_channel.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-15 22:37:24 +01:00
Daniel Baluta 0a4a94f35c drivers: imx: sdma: Use shorter name for descriptor
s/descriptor/desc because makes lines shorter thus the code
cleaner and easier to read.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-15 22:37:24 +01:00
Daniel Baluta c0db6cae86 drivers: imx: sdma: Fix SDMA scripts offsets
These numbers are used for i.MX8MP and are in agrement
with Linux sdma driver.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-15 22:37:24 +01:00
Deepak R Varma 8df84ab56d audio: remove extra blank lines
Remove extra blank lines before and after curly braces. Problem
reported by checkpatch script.

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
2020-04-16 00:35:14 +03:00
Marcin Maka 7702288fd5 eq_fir: remove params handler, the default one is good enough
The code removed just called the default common handler,
which is now done by the infrastructure.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-15 14:55:54 +02:00
Marcin Maka bb95c04e7d volume: remove params handler, the default one is good enough
The code removed just called the default common handler,
which is now done by the infrastructure.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-15 14:55:54 +02:00
Marcin Maka 8a7875d5e4 comp: run default params handler if not defined by target comp
Actions perfomed by the default handler are required to keep
the component device state consistent (e.g. dev->frames are
initialized). While the current comp_params() silently skips
the component if params are not defined.

New simple components will not be required to define a handler
if no extra steps are needed.

It is also an opportunity to reduce the code of existing components
Note that most of the extra steps are moved to prepare() in many
implementations already (like volume), others may follow and remove
their params() handlers once reduced to a single call to the default
handler (like mux recently did).

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-15 14:55:54 +02:00
Marc Herbert 3808dfec67 CI: Travis: reduce the number of stages to two
Travis stages are designed not to run after the first that fails. We
never used them for that, only for nicer presentation of
results. Running all tests independently of each other (e.g.: qemu and
doxygen) even when one fails is more important than presentation, so
reduce the number of stages to just two: "buildonly" and "tests"
Travis job name: doesn't look as good alone as when combined
with a stage name but it's enough to identify jobs.

Reducing to just one stage is tempting but it would require a lot more
naming surgery so let's start with this small diff and two stages for
now.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-04-11 14:07:27 +01:00
Karol Trzcinski b12a6626c5 trace: Remove metaprogramming from trace implementation
Functions written with metaprogramming are hard to read and debug,
so newly introduced version should be easier to understand for
new developers. Moreover introduced version is more generic and
compact because of usage single logging function implementation
regardless of given parameters number and usage of atomic or
mbox version.
There is no longer a need to heavy test logging function under
UT with different number of arguments, because of it singular
implementation.

Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
2020-04-10 19:28:37 +01:00
Karol Trzcinski 6f2e09be0a trace: Point correct file with TRACE_CLASS in comment near trace_event()
Comment should be aligned with file content.

Signed-off-by: Karol Trzcinski <karolx.trzcinski@linux.intel.com>
2020-04-10 19:28:37 +01:00
Marcin Maka 245f5aa8a8 alloc: remove unused rrealloc
rrealloc function is no longer in use, so it is better
to remove it. Unused code is no longer tested so its
quality is unknown.

The current implementation is simple but expensive since
extra calls to malloc/free requires time and risky since
at some point requires double allocation of potentially
large object. Please consider re-implementation instead
of restoring.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-10 20:00:05 +03:00
Janusz Jankowski f1109e2b70 audio: src: remove dead assignment
Reported by clang's scan-build.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2020-04-10 16:58:12 +01:00
Janusz Jankowski 6d76acf67a debug: remove dead assignment
Reported by clang's scan-build.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2020-04-10 16:58:12 +01:00
Tomasz Lauda c412a8559e host: optimize copy by removing condition statements
Optimizes host copy function by removing checks for copy type
and using preconfigured callback instead.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-10 16:21:42 +01:00
Adrian Bonislawski 162c3988b8 tgl: enable slave core boot with alternate reset vector
disable CONFIG_NO_SLAVE_CORE_ROM for tgl to use alternate reset vector

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 6d5b7cf128 arch: add alternate reset vector
move lp sram heaps to put alternate reset vector sections at the beginning
 add AltBootManifest section with entries to unpack
 alternate reset vector asm and cmake link
 unpack lpsram sections in master core boot

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 82fee903b7 tgl: L1 init defines
used to init L1 memory in alternate boot for slave cores

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski a71c82d78b cpu: turn on core memory as first step to enable core
this will allow to access memory from the very beginning
and avoid problems in potential future changes

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski be083cf350 cpu: unpack dynamic vectors
This will allocate memory for dynamic vectors, unpack them
from WindowOverflow4 and setup global vecbase pointer used
in alternate reset vector

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 5598a1c0b8 tgl: add dynamic vectors size
needed for alternate boot for slave cores

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski d7f553f1a8 rimage: use lma if available
some sections may use different lma than vma address,
in such case rimage needs to use lma

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 8294cf3d51 rimage: show LMA and VMA in section view
Sometimes they will be different and this will make developer
aware of the differences

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 2ff3056a92 kconfig: add CONFIG_NO_SLAVE_CORE_ROM
Add CONFIG_NO_SLAVE_CORE_ROM to determine how to boot slave cores

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 359eb0b255 pm_runtime: correct PWRCTL + power waiting
To make sure core is powered correctly when we move on

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski ac536b3776 pm_runtime: add trace error
trace_power_error was not defined

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 27e0450e36 tgl: allow to include interrupt.h in asm
It will allow to use TGL IRQ defines in asm

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Adrian Bonislawski 4efa6ed73f arch: add missing ATOMCTL register for slave cores
Some instructions like s32c1i depends on ATOMCTL register settings
and it should be set for slave cores to works properly and not hang
on these instuctions

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
2020-04-10 16:19:59 +01:00
Tomasz Lauda a2db8e52cf schedule: dox: complete api documentation
Cleans up existing documentation and adds missing one.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-10 14:45:49 +02:00
Tomasz Lauda 1c2f3c0ce5 schedule: return status of operations
Changes schedule operations to return error in case
chosen scheduler is not found or scheduler doesn't
support mandatory operation.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-10 14:45:49 +02:00
Tomasz Lauda 0a57497bc8 schedule: remove unused header
Removes inclusion of unused header.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-10 14:45:49 +02:00
Artur Kloniecki 101364dc28 audio stream: Replace old API usage in clients with new one.
Some components used stream.free/avail fields directly. With introduction
of audio_stream_get_free/avail getter functions, such usage should be
removed.

Signed-off-by: Artur Kloniecki <arturx.kloniecki@linux.intel.com>
2020-04-10 11:51:18 +01:00
Artur Kloniecki ee3f7d9737 audio stream: Introduce underrun/overrun_permitted fields.
Add underrun_permitted and overrun_permitted fields to audio_stream
structure and initialize them with regard to associated buffer config.
Add audio_stream_get_avail/free functions, which take above-mentioned
fields into account and use them in getter functions within audio_stream.h
instead of avail/free fields directly.

Signed-off-by: Artur Kloniecki <arturx.kloniecki@linux.intel.com>
2020-04-10 11:51:18 +01:00
Marc Herbert edb2c60054 CI: Travis: disable host-testbench as long as it ignores errors
See https://github.com/thesofproject/sof/issues/2752

host-testbench.sh exits with success 0 when tests fail. Random, recent, all
green example in PR #2751:

https://travis-ci.org/github/thesofproject/sof/jobs/672996210 is green but:

  eqiir test failed!

I didn't even have to spend time to search for this example, I only
looked at the most recent PR.

Ignoring failures is the very worst type of validation issue because it
makes everyone think everything is OK when it's not. Hides regressions.

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-04-10 10:53:16 +01:00
Sebastiano Carlucci 9915b803f7 audio: dcblock: Fix int overflow issue in dcblocker
This patch fixes an integer overflow issue that can occur in the
dcblocker. The overflow happened when doing x - x_prev. If x_prev
is sufficiently large (positive or negative), it can cause an overflow.

Casting x to a 64 bit int first fixes this issue.

Signed-off-by: Sebastiano Carlucci <scarlucci@google.com>
2020-04-09 13:04:37 +01:00
Daniel Baluta 5f7d4e268f drivers: imx: irqsteer: Fix computation of status
status of an output irqsteer line is a 64bit variable
composed of 2 x 32 bit registers.

Because first 64 output irqsteer lines only holds status for
IRQ in[0] we have a different formula for getting the status
compared to the existing implementation done for i.MX8QXP/i.MX8QM.

Mapping for status register is as follows:

line 0 -> [0 | chan0]
line 1 -> [chan2 | chan1]
line 3 -> [chan4 | chan 3]

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-09 09:11:18 +01:00
Daniel Baluta b4cce00e46 drivers: imx: irqsteer: Add IRQ fixup for mask/unmask
IRQSTEER module on i.MX8MP accepts 160 interrupts in 5
groups of 32 interrupts and steers them to an output of 3 lines.
Each output line has 64 interrupts.

The interesting part here is how the interrupts are steered and
how the registers are mapped.

Each 32 IRQ input group has 1 register for mask/set/status. Lets name
REGn the base of such registers. Then, according to the documentation
we have:

REG0 -> IRQ in[159:128]  }
REG1 -> IRQ in[127:96]   } =>  IRQ out[2] [191:128] from in[159:96]
REG2 -> IRQ in[95:64]    ]
REG3 -> IRQ in[63:32]    ] =>  IRQ out[1] [127:64]  from in[95:32]
REG4 -> IRQ in[31:0]     | =>  IRQ out[0] [63:0]    from in[31:0]

Notice that the original IRQ input interrupts are shifted with 32. When
computing the corresponding registers for an output register we need
to subtract 32 to get the correct register. This is achieved using
a fixup function which only applies for i.MX8MP.

Another important observation is that the IRQ in[31:0] is the single
valid group on output line 0. Thus in our represanation leaving a gap
with first 32 interrupts unused.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-09 09:11:18 +01:00
Daniel Baluta 8aac5d4c2c drivers: imx: irqsteer: Reduce irqsteer child nodes
On i.MX8MP irqsteer instance has only 3 output lines. So, reduce
the number of child nodes to 3.

Also, IRQSTEER on i.MX8MP has fewer input interrupts than on
i.MX8QM/i.MXQXP.

It has 160 input interrupts grouped as 5 lines of 32 interrupts, who
then are mapped on 3 output lines each with 64 interrupts.

The special case here is line 0 which holds only the first 32
interrupts. For this reason, we need to do:
	- start with first child at 0 instead of 32, because interrupts
	starting at 32 should be in a different child cascased
	controller.
	- fix formula for computing MASK/SET/STATUS registers
	- fix irqs register num.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2020-04-09 09:11:18 +01:00
Marc Herbert d62629152f CI: Travis: less VM isolation for speed-up. Remove matrix.
Looking at any recent Travis build log:

1. more than half the time is spent in the exact same "docker pull"
   command,
2. The qemuboottest stage rebuilds again the exact same thing than the
   previous test stage.

Fix 1. by re-using the same docker instance for multiple platforms.
Fix 2. by dropping from the test stage builds performed again in
the qemuboottest stage.

Random sample before:
  Total (VM) time  1 hr 15 min
  Real time             25 min (depends on current Travis load)
After:
  Total (VM) time       30 min
  Real time             10 min (depends on current Travis load)

The price to pay for this matrix reduction and speed up is coarser
reports in case of failure. Considering these tests are the most basic
possible one expects them to be rarely ever broken.

Remove the top-level matrix expansion as it was becoming impractical for
these heterogeneous builds ("PLATFORM=tools"?!). The combination of the
matrix and YAML anchors was not very obvious. Use YAML anchors
exclusively.

Rename default stage "test" to "buildonly"

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-04-09 09:09:50 +01:00
Sebastiano Carlucci 4223d87bbe audio: dcblock: Fix doxygen error for dcblock.h
This commit fixes a doxygen issue caused by a mismatch between
dcblock_find_func()'s declaration and its corresponding comment block.

Signed-off-by: Sebastiano Carlucci <scarlucci@google.com>
2020-04-09 08:51:46 +01:00
Marcin Maka 939c14cd2b comp: use list_relink in make_shared
Previous version worked only for empty lists.
There is potential case when buffer is already connected to
some local buffer on either end and then connected to a
buffer on another core which calls make_shared expected
to preserve existing links.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 22:13:35 +01:00
Marcin Maka c9e2f515c2 list: add relink operation called after the list is moved
Updates next/prev pointers with the new address of the list
head.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 22:13:35 +01:00
Marcin Maka a00f42b0a4 comp: replace rrealloc with platform method for shared objects
Rrealloc is a very expensive method and may fail for a large
component. There is existing platform specific method to "convert"
local objects into shared ones which is very quick on existing
platforms.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
2020-04-08 22:13:35 +01:00
Tomasz Lauda d29ebe8fe6 pipeline: atomic schedule of connected pipelines
Implements atomic scheduling of connected pipelines that
supposed to be triggered at the same time. If the trigger
is propagated to the connected pipelines, then the expectation
is that they should be started at the same system tick.
Otherwise it might potentially lead to losing some samples
at the beginning for one of the pipes.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2020-04-08 19:36:31 +01:00
Bartosz Kokoszko a716056c4b tgl: use additional CHANNEL define in rt711 + rts1308 tplg
This commit adds CHANNELS define in sof-tgl-rt711-i2s-rt1308.m4
topology in order to properly set pipeline pcm channels and dmic
configuration (STEREO_PDM0 or FOUR_CH_PDM0_PDM1 mode).

Signed-off-by: Bartosz Kokoszko <bartoszx.kokoszko@linux.intel.com>
2020-04-08 19:32:14 +01:00
Seppo Ingalsuo 37850f5747 DMIC: Rename DMIC IPC struct field reserved_2
Since the SOF kernel and firmware headers need to be the same the
rename is also done on firmware side. The fifo_bits_b parameter was
deprecated in firmware ABI version 3.0.1 and the value has been
ignored. Since the kernel sets this in case of ABI version 3.0.0 or
earlier the name reserved_2 is not appropriate.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2020-04-08 19:30:53 +01:00