Calculates average and records the maximum execution cycles taken by
each execution round and prints the results out once every 1024 round,
e.g. roughly once per second with a typical 1ms tick configuration. The
output is mimicked from the Zephyr side scheduler output. There is a
Kconfig menu option under debug menu to disable this feature. Currently
the default is on.
Signed-off-by: Jyri Sarha <jyri.sarha@intel.com>
For imx, is_cached() is implemented based on _memmap_cacheattr_reset.
This keeps the attributes for a 512MB region, therefore
we have the following address ranges:
Address range - hex digit
0 - 1FFFFFFF - 0
20000000 - 3FFFFFFF - 1
40000000 - 5FFFFFFF - 2
60000000 - 7FFFFFFF - 3
80000000 - 9FFFFFFF - 4
A0000000 - BFFFFFFF - 5
C0000000 - DFFFFFFF - 6
E0000000 - FFFFFFFF - 7
While testing on i.MX8ULP we discovered that addresses from
(0 – 1FFFFFFF) range where not correctly marked as cacheable,
because the compiler is optimizing the code incorrectly.
With macros, is_cached(address) expands to
(((((uint32_t)(&_memmap_cacheattr_reset_8ulp)) >> \
((((((uintptr_t)((void *)address) >> 29) & 0x7)) << 2))) \
& 0xF) == 1)
When using _memmap_cacheattr_reset_8ulp = 0x22222221
and address = 0x1A801000 is_cached(0x1A801000)
should be true, but instead is false.
We want to avoid this buggy compiler optimization.
So we replaced the macros from cache.h with functions.
To make this generic, I created a cache_attr.c file in
src/arch/xtensa/drivers/ and a config option
- COMPILER_WORKAROUND_CACHE_ATTR, which must be selected
if the workaround is needed.
Also, we replaced the call to glb_addr_attr() from glb_is_cached()
with a function pointer that is initialized in
src/arch/xtensa/drivers/cache_attr.c.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
When the SOF Kconfig is included in other projects, the main menu should
not be that of SOF, rather it should be of the project including SOF.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Jyri Sarha