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3 Commits

Author SHA1 Message Date
Tomasz Leman 5b8ba30694 ace: overlay: update clock frequency 
Changing max clock frequency for FPGA configuration.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
 2023-09-28 07:53:37 +02:00
Adrian Warecki 447b365b62 mtl: board: Update mtl board configuration 
Necessary configuration options of the mtl board
have been enabled.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
 2022-10-18 16:10:37 +03:00
Adrian Warecki d5967d1913 platform: mtl: Add meteorlake plaftom 
Added base files of meteorlake plaftom:
  Board configuration
  CPU, clock and memory configuration
  Platform bootstrap code
  IPC driver wrapper for Zephyr IPC API for ACE1.5 platforms.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
 2022-09-21 15:15:26 +02:00