Remove option to immediately send IPC in ipc_send_msg().
In current implementation, secondary core can directly write IPC mailbox
and registers. It may lead to conflict with IPC's that are being send
from queue on primary core.
All IPC responses and notifications should be queued on primary core to
synchronize two types of DSP to host messages between cores.
Changing flow only for IPC4/Zephyr. Leaving XTOS path unchanged.
Signed-off-by: Przemyslaw Blaszkowski <przemyslaw.blaszkowski@intel.com>
--pristine makes no difference for github but it's a good for anyone
trying to reproduce results and copying the command.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Changes in the GoogleRtcAudioProcessing component to
--Allow sample rate and number of channels to explicitly be specified.
--Update the memory management.
--Allow parameters to be passed.
--Allow more than mono to be processed
--Allow parameters to be specified from Kconfig
Signed-off-by: Per Åhgren <peah@google.com>
At present codes of rtnr and google-rtc-audio-processing, a
reconfigure() function is called per copy() routine to dynamically
update config blob in COMP_STATE_ACTIVE state. The logic has no
problem in practice.
However, if there are cases that config blob is always empty or
arrived late, hundreds of warning message lines per second will be
produced by comp_get_data_blob() called from reconfigure(),
restlessly complaining that data blob is not set.
This commit adds a pre-check for early-return under such cases to skip
comp_get_data_blob() calls with warn messages.
Signed-off-by: Pin-chih Lin <johnylin@googele.com>
Larger stack context stack size is required for RTNR and
GOOGLE_RTC_AUDIO integration on Intel platforms.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
Add Speaker PCM to cavs-sdw topology. We need to set NUM_SDW_AMPS=1 in
CMakeLists.txt if there is only one amplifier in the device and set
NUM_SDW_AMPS=2 if there are two amplifiers.
Set SDW_DMIC=1 if there is a SDW DMIC, like rt714 in the device.
The 2nd ALH copier stream name should be the same as the 1st ALH
copier, and no need to connect to the route.
The 2nd ALH copier data will be set to the 1st ALH copier's gateway config
in the aggregated mode.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
A topology may be constructed by some .conf files. We may use a
duplicated route index or pipeline index by accident. This commit
suggests a rule to assign route and pipeline index.
We have a consistent pcm id. For example,
Jack out: 0
Jack in: 1
Speaker: 2
Microphone: 4
We can use a simple formula to assign the route and pipeline index
for each pcm.
The formula this commit suppests is pcm id * 10 ~ pcm id * 10 + 9.
That is 0 ~ 9 for pcm 0, 10 ~ 19 for pcm 1, and so on.
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
This reverts commit ce28e09bd3.
This fixes Zephyr's git describe command and build reproducibility.
I tried fairly hard various git fetch options like --shallow-exclude
and --shallow-since but they did not save that much download (200MB at
best), required some hardcoding and most importantly they make complete
clones shallow again when invoked unconditionally. Not worth the
effort, build reproducibility is more important.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
At first llp slot is released by dai_dma_free for dai_free in
ipc4 path. Now dai_dma_free is removed from dai_free, so add
another function dai_release_llp_slot to free llp slot in
dai_free.
Signed-off-by: Rander Wang <rander.wang@intel.com>
Current llp slot is allocated based on virtual index
in node id which is incorrect since different dai may
use the same virtual index. Now find the first unused
llp slot and assign it to stream and save the slot info
to avoid querying it for each update
Signed-off-by: Rander Wang <rander.wang@intel.com>
Not all ipc_comp_dev structs contain a comp_dev pointer, it's unioned
based on the "type" field. Since the object ID is part of an IPC
command and under the control of external software, and since there
can be valid non-stream components stored in the list, we need to
check this type before accessing the invalid data belonging to the
other union types.
Signed-off-by: Andy Ross <andyross@google.com>
It's possible to reach dma_trace_on() from IPC handlers based on host
state before DMA trace has been initialized (found this via fuzzing,
so the precise circumstances are a little opaque). When that happens,
the schedule_task() call ends up putting a delayed work queue item
into the Zephyr queue which has a NULL callback. This eventually
blows up later when the timeout expires.
Check for initialization state before doing anything.
Signed-off-by: Andy Ross <andyross@google.com>
Command format errors during fuzzing are reported for virtually all
commands, and the resulting flood of logging becomes a severe
performance penalty (i.e. we get a lot less fuzzing done per CPU
cycle).
Signed-off-by: Andy Ross <andyross@google.com>
This extends the ideas in CONFIG_LIBRARY=y to implement SOF as an
application for the Zephyr native_posix architecture. These are host
x86 or x86_64 binaries that include a full OS build, which can be used
(via mocked drivers) for testing against host validation environments
like ASAN/MSAN.
The mechanism uses the existing "host" architecture used by
CONFIG_LIBRARY, but adds a new platform layer named "posix", populated
entirely with stubs.
No driver integration is provided in this patch. The resulting
executable builds correctly, but has no devices and won't do anything.
Signed-off-by: Andy Ross <andyross@google.com>
This file needs the clk.h APIs, so include the header. Don't include
the Xtensa cache.h, as it's unused (and not supposed to be, zephyr.c
is portable code). Use the proper interrupt en/disable APIs instead
of the SOC-level calls they wrap.
Signed-off-by: Andy Ross <andyross@google.com>
The timer.h header references k_cycle_get_64(), which is defined in
kernel.h. Was previously hidden by a transitive include somewhere.
Signed-off-by: Andy Ross <andyross@google.com>
This was calling clk APIs without the header. Discovered when
native_posix exposed a previous transitive include.
Signed-off-by: Andy Ross <andyross@google.com>
This saves a couple seconds when building from scratch on Linux.
On Linux the default CMake generator is "Makefiles" which is _not_
parallel by default.
Thanks to the previous commit it's still possible to manually switch to
"Makefiles" if desired.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
It's pointless and hardcodes the CMake generator.
Also remove wrong comment added in commit
6cba64d2cb ("xtensa-build-zephyr.py: fix a few minor pylint warnings")
The rimage part of the comment was flat out wrong.
The smex part of the comment is correct but in the wrong place.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Adopt module interface for src component.
IPC3 has compatibility issues, it continues to use comp_driver.
Convert to module adapter only for IPC4.
Signed-off-by: Gongjun Song <gongjun.song@intel.com>
The commit that caused this bug is 1ec9fc1fbf. Added the sink_c
parameter, but did not set sink_c in src.c.
This commit will set sink_c to solve the issue of wrong sink rate.
Signed-off-by: Gongjun Song <gongjun.song@intel.com>
1. Add a free memory function to support PR#6230 and PR#6331,
the latest prepare/reset API flow update of module_adapter.
2. This requires DTS library v1.0.7 to support this change.
Signed-off-by: Joe.Cheng <joe.cheng@xperi.com>
This should get rid of most warnings in daily tests
```
Node.js 12 actions are deprecated. For more information see:
https://github.blog/changelog/
2022-09-22-github-actions-all-actions-will-begin-running-on-node16...
Please update the following actions to use Node.js 16: actions/checkout@v2
```
Example at
https://github.com/thesofproject/sof/actions/runs/3597808171
v3 seems backward compatible. Upgrade only the most used instances for
now (most used because of the `matrix` of platforms), upgrade everything
in a few days if no issue is spotted.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Clear general purpose pending interrupt
before enabling interrupts between host and DSP.
The GIPn bit, from MU Status Register is cleared
by writing it as “1” in order to de-assert the
interrupt request source at the interrupt controller.
This fixes a fw loading failure after a soft reboot
caused by GIP bit that was 1.
The problem was the MU which triggered endless interrupts
causing timeout on Kernel side, which was waiting for
FW_READY message.
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Update READY_IPC value based on changes regarding MU reset.
READY_IPC value comes from:
- clear GP pending interrupt #0 and #1 from MU's xSR register;
- enable GP #0 and #1 for Host -> DSP and DSP -> Host
message notification from MU's xCR register;
- now interrupt host to tell it we are done booting
by setting GIRn bit in MU's xCR register.
So, "00 00 00 c0 00 00 04 c0" is the MU's xSR and xCR registers:
xSR: c0000000 and xCR: c0040000
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
DIV_ROUND_UP is a common macro exposed in public headers without
namespacing. Change the name to SOF_DIV_ROUND_UP to avoid collisions
with other systems/libraries.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Tomasz Leman