Commit Graph

86 Commits

Author SHA1 Message Date
Jaroslaw Stelter 9303f6d49d intel_adsp: ptl: Enable LE HEAP on ptl
Enable L3 HEAP to support D3 scenarios on PTL

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2024-06-24 16:15:41 +02:00
Piotr Makaruk 297badca87 intel_adsp: ptl: Enable chain-dma on PTL platform
Enable chain-dma hw support on PTL platform

Signed-off-by: Piotr Makaruk <piotr.makaruk@intel.com>
2024-06-24 16:15:41 +02:00
Jaroslaw Stelter 05bfc36dac ptl: Add initial PTL configuration
Patch adds PTL configuration basing on MTL

DMIC depends on PM_DEVICE_RUNTIME and PM_DEVICE_POWER_DOMIAN settings.
To effectively enable DMIC these flags must be set.
Additionally DMIC Ownership bit is not supported on ACE 2.0 and ACE 3.0.
Therefore CONFIG_DAI_DMIC_HAS_OWNERSHIP is switched off.

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2024-06-24 16:15:41 +02:00
Guennadi Liakhovetski ae4f3143c1 llext: only enable on ACE platforms
cAVS platforms don't use LLEXT because memory mapping isn't supported
on them. Select LLEXT per platform, so far only for ACE 1.5 and 2.0.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2024-06-12 11:07:35 +01:00
Kai Vehmanen b10ec85ebd audio: base_fw: do not use platform interface for vendor extensions
In commit 14c4e86757 ("audio: base_fw: add platform layer to IPC4
hw_config data"), the platform specific code was moved to platform
layer.

This commit implements a lighter weight abstraction for the moved
code. Instead of using the platform layer, the Intel specific vendor
code is added directly in base_fw_intel.c and guarded by a Kconfig.
All other IPC4 build targets will use an empty implementation.

This avoids the need to add a platform definition for all IPC4 targets.
The common implementation in base_fw.c is sufficient to cover all
mandatory functionality required e.g. by the upstream SOF Linux driver's
IPC4 implementation.

The interfaces are renamed to refer to "vendor" instead of "platform",
to avoid any confusion with the platform layer with the new
implementation.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-05-08 09:41:28 +01:00
Laurentiu Mihalcea 65b8a32f27 nxp: imx8ulp: switch to native Zephyr drivers and timer domain
Switch to Zephyr native drivers and timer domain. This
includes:
	1) Switching all imx8ulp topologies to timer domain.
	2) Disabling Zephyr DMA domain
	3) Various interrupt-related fixes via Kconfig-related
	ifdef logic.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-25 14:12:41 +03:00
Laurentiu Mihalcea 4b567533eb nxp: imx8ulp: and nodes and enable drivers for SAI, EDMA and HOST_DMA
Add DTS nodes for and enable the drivers of SAI, EDMA
and HOST_DMA.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-25 14:12:41 +03:00
Laurentiu Mihalcea 3f1f45aaeb boards: imx8ulp: switch to Zephyr logging
Switch to Zephyr logging to prepare for the
switch to native Zephyr drivers.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-25 14:12:41 +03:00
Laurentiu Mihalcea 9737e124bc nxp: imx8/imx8x: switch to native Zephyr drivers and timer domain
This commit includes all necessary changes for switching
to timer domain and Zephyr native drivers on imx8 and imx8x.
This consists of:
	1) Switching all imx8 topologies to timer domain.
	2) Disabling Zephyr DMA domain
	3) Various interrupt-related fixes via Kconfig-related
	ifdef logic.

This commit includes all necessary changes for switching
to native Zephyr drivers on imx8/imx8x.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-23 12:20:31 +01:00
Laurentiu Mihalcea 2cd630465b nxp: imx8/imx8x: add SAI, EDMA, ESAI and HOST_DMA nodes
Add nodes for the following IPs: SAI, EDMA and ESAI. Also,
add node for HOST_DMA. These are all required for switching
to Zephyr native drivers.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-23 12:20:31 +01:00
Laurentiu Mihalcea 4284556e9b nxp: imx8/imx8x: switch to Zephyr logging
Switch to using Zephyr logging on imx8 and imx8x to
prepare for using native Zephyr drivers.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-04-23 12:20:31 +01:00
Adrian Bonislawski 031619c526 boards: mtl: enable KCPS dynamic clock control
This will enable dynamic clock control based on KCPS budget

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2024-04-15 13:48:33 +01:00
Tobiasz Dryjanski e88eab88b7 telemetry: Enable Telemetry
Add config for enabling telemetry and enable it

Signed-off-by: Tobiasz Dryjanski <tobiaszx.dryjanski@intel.com>
2024-04-12 19:21:42 +03:00
Tobiasz Dryjanski 79751cfc27 memory_window: Increase Debug Window size
Increase Debug Window (Memory window 2) size by one slot (4096 bytes).
The reason for this change is making space for telemetry functionality.

Signed-off-by: Tobiasz Dryjanski <tobiaszx.dryjanski@intel.com>
2024-04-12 19:21:42 +03:00
Grzegorz Bernat 78831db0f9 app: boards: Enable Probe for LNL
Enables extraction and injection probes for LNL platform.
NOTE: this commit does NOT enable probe log backend.

Signed-off-by: Grzegorz Bernat <grzegorzx.bernat@intel.com>
2024-04-02 14:16:52 +03:00
Laurentiu Mihalcea f0740ed103 west.yml: update Zephyr to 1f55be8b42df
Contains the following squashed SOF commits:

nxp: imx8ulp: change SOC name to MIMX8UD7
zephyr: CMakeLists.txt use new `CONFIG_SOC_C` for 8ULP
cmake: update configs for NXP ADSP

and the following Zephyr patches affecting SOF:

951763939034 nxp: imx8ulp: change SOC name to MIMX8UD7
b8214b673970 dts: xtensa: nxp_imx8: add SAI1 node
a0e32f07ef76 dts: intel_adsp: ace: update host dma copy alignment
3fde2c50c6ef tracing: add intel ADSP memory window backend
6b9d01f995c7 intel_adsp/ace: power: No pending transaction before power gate
6ea749de5283 arch: rename arch_start_cpu() to arch_cpu_start()
b69d2486fee6 kernel: rename Z_KERNEL_STACK_BUFFER to K_KERNEL_STACK_BUFFER
1f55be8b42df nxp: imx8: change CONFIG_SOC_<name> to match the value
688fbb53aeb2 intel_adsp: ace: Fix sparse error

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2024-04-02 13:13:07 +03:00
Laurentiu Mihalcea aaf2f11eb9 nxp: imx93: Switch to native Zephyr drivers and timer domain
Starting with this commit, i.MX93 now uses the timer domain
in conjunction with the Zephyr native drivers.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-03-25 15:12:00 +02:00
Laurentiu Mihalcea 0441484940 boards: mimx93_evk_a55: Enable SAI, EDMA and HOST DMA drivers
This commit introduces the necessary changes to the overlay
and configuration files required for enabling the Zephyr native
SAI, EDMA and HOST DMA drivers on i.MX93.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2024-03-25 15:12:00 +02:00
Seppo Ingalsuo 51bd1aead3 App: Boards: Set CONFIG_COMP_DRC=y for LNL platform
The DRC component was not included to build. This change
avoids error and DSP panic in topology load.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2024-03-19 20:19:57 +02:00
Kai Vehmanen 0b1d36ad11 app: boards: intel boards, disable winstream console
Disable CONFIG_WINSTREAM_CONSOLE in all Intel configs that enable SOF
mtrace for logging. Also disable CONFIG_LOG_BACKEND_ADSP that uses
winstream as backend. No need to have two memory window based logging
backends enabled at the same time.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-03-14 09:55:08 +02:00
Kai Vehmanen 22b3518601 west.yml: update Zephyr to f9f44b6dcdd
Switch back to main Zephyr repository and commit f9f44b6dcdd.

This includes following squashed SOF commits that are
needed to adapt to HWMv2 changes in Zephyr:

zephyr: app: scripts: intel_adsp: change board names to HWMv2
zephyr: sof: update board name for HWMv2
zephyr: intel_adsp: Change ACE SoC name to HWMv2
app: boards: imx93: updates for zephyr hwmv2

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-03-08 13:16:58 +02:00
Laurentiu Mihalcea 5ec60b341b app: boards: mimx93_evk_a55: change SRAM0's address to 0xd000000
Zephyr commit b985442829dd ("dts: mimx93_evk_a55: avoid conflict
with Ethos-U NPU reserved memory") changes SRAM0's address to
0xd0000000. This breaks the i.MX93 SOF build because the SRAM0
node is no longer deleted so west build complains about having
2 SRAM0 nodes with different addresses.

To fix this, update the deleted node's base address.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2024-03-06 11:13:57 +02:00
Guennadi Liakhovetski fec8e32e2f ace: don't re-define CONFIG_LOG*
CONFIG_LOG and CONFIG_LOG_MODE_DEFERRED are already defined in the
common prj.conf, no need to re-define them additionally in
architecture-specific configurations.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2024-02-26 12:21:39 +00:00
Peter Ujfalusi 557e581ca8 board: intel_adsp_ace15_mtpm: Drop CONFIG_DMA_DW_SUSPEND_DRAIN
The purpose of CONFIG_DMA_DW_SUSPEND_DRAIN is to empty the FIFO before
disabling the channel by draining it.
Since the peripheral is disabled before the DMA
(CONFIG_COMP_DAI_STOP_TRIGGER_ORDER_REVERSE is not selected), the DMA will
not be able to do that causing drain timeout.

The stop is used in two cases:
Stream stop:
the content of the FIFO does not matter as we stop the stream.

Pause/resume:
On pause the DMA is suspended (DW_CFGL_SUSPEND bit set)
On resume the DMA is stopped, re-configured and then started again instead
of resuming

The peripheral is started after the DMA stop and start.

Leftover audio data might cause audio glitch on resume, it is probably
better to disable the draining.

Note: if we want to have draining enabled we need to select the
CONFIG_COMP_DAI_STOP_TRIGGER_ORDER_REVERSE at the same time to force the
DMA to be stopped before the DAI.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2024-02-09 19:25:40 +02:00
Marcin Szkudlinski 8e34109e10 AEC: Enable Google AEC with Mock compliation
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2024-02-08 11:48:20 +00:00
Jaroslaw Stelter 17b3b01de9 lnl: conf: Enable Library authentication on LNL
This enables library authentication on LNL platforms.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2024-01-26 14:08:58 +00:00
Jaroslaw Stelter 6bc4e9d444 mtl: conf: Enable library authentication on MTL
This enables library authentication on MTL platforms.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2024-01-26 14:08:58 +00:00
Rander Wang e89f21e181 board: enable 64 bits timestamp support on intel platforms
TGL, TGL-H and ACE platforms will use 64 bits timestamp.

Signed-off-by: Rander Wang <rander.wang@intel.com>
2024-01-08 14:23:15 +00:00
Tomasz Leman ddf70fa033 config: ace: enable clock gating
This patch enables clock gating in configurations of a ace platforms.

With CONFIG_ADSP_IDLE_CLOCK_GATING enabled clock gating is always
enabled during WAITI.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-12-15 17:07:46 +02:00
Laurentiu Mihalcea 925a48668b app: boards: Add overlays for i.MX8QM and i.MX8QXP
This commit is needed because the current Linux kernel
version used in our internal testing doesn't
contain the patches that enable MU2's power.
As such, to avoid failures in the internal tests,
disable the CCM and LPUART2 IPs.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-11-13 09:57:58 +02:00
Zhang Peng f8a9591370 app: boards: Add imx8ulp conf to support imx8ulp config
Add conf file for imx8ulp: nxp_adsp_imx8ulp.conf

Signed-off-by: Zhang Peng <peng.zhang_8@nxp.com>
2023-11-06 09:34:37 +01:00
Fabiola Kwasowiec 90fef5afd2 src_lite: add module
Addition of SRC Lite module,
which only supports a subset of conversions
supported by the SRC module.

Purpose of SRC Lite module is memory optimization.
Code of SRC Lite is drastically reduced and requires
significantly less memory. When needed one of
defined conversions, driver can choose SRC Lite
module instead of SRC module to optimize memory utilization.

48 -> 16kHz
44.1 -> 16 kHz
32 -> 16 kHz
44.1 -> 48

Signed-off-by: Fabiola Kwasowiec <fabiola.kwasowiec@intel.com>
2023-10-26 17:08:29 +03:00
Jaroslaw Stelter 8be15f5469 lnl: Fix KD topology tests failure
KD topology tests fail on LNL due to insufficient size of
heap memory. During creation of KD topologies with
4ch audio format, FW fails on memory allocation.
The patch increases HEAPMEM size.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-10-25 16:49:09 +01:00
Kai Vehmanen f8a202aa92 app: boards: intel_adsp_ace20_lnl: drop DMA_DW_SUSPEND_DRAIN
The LNL board does not use DMA_DW driver, so the board
file should not set any build options specific to that
driver.

This fixes build warning:

--cut--
warning: DMA_DW_SUSPEND_DRAIN (defined at
drivers/dma/Kconfig.dw_common:27, drivers/dma/Kconfig.dw_common:27,
drivers/dma/Kconfig.dw_common:27) was assigned the value 'y' but got the
value 'n'.
---cut--

Link: https://github.com/thesofproject/sof/issues/8356
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-10-24 20:29:58 +03:00
Seppo Ingalsuo 76754b52d0 App: Intel: Enable Aria build for TGL and TGL-H platforms
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-10-20 12:35:53 +03:00
Jakub Dabek 1721f70426 logging: add logging through probes
Logging with probes was not implemented. This implements
ipc that enables logging with probe configuration.

Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
2023-09-15 12:57:07 +03:00
Seppo Ingalsuo 8d01ad69a7 Kconfig: Enable crossover and multiband-DRC by default
This patch enables for TGL and MTL platforms as default
to enable CI build tests, etc.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-08-30 16:01:59 +01:00
Kai Vehmanen 59028ad3d1 drivers: Intel: remove Intel XTOS drivers
Now that Intel cAVS2.5 has been migrated to use native Zephyr
drivers, we have no need to keep the Intel specific XTOS
drivers in the tree anymore.

Adjust board configuration files to not refer to removed
Kconfig options.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-21 12:21:55 +03:00
Kai Vehmanen 9948d439d9 app: Intel: switch cAVS2.5 configs to use IPC4 by default
The IPC3 build is no longer supported for Intel cAVS2.5 target,
so move the config overlay definitions as-is to the main
board config file.

To smoothen the transition, keep an empty IPC4 overlay file
in the tree to allow developers to update build scripts.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-08-21 12:21:55 +03:00
Peter Ujfalusi 3a17cde8fc board: intel_adsp_cavs25_tglh: Enable support for library loading
Add the needed config options to enable the library loading support.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-08-17 13:28:11 +01:00
Peter Ujfalusi b42bbcaed7 board: intel_adsp_cavs25: Enable support for library loading
Add the needed config options to enable the library loading support.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-08-17 13:28:11 +01:00
Serhiy Katsyuba 81bccef08d app: Enable probe for MTL
Enables extraction and injection probes for MTL platform.
NOTE: this commit does NOT enable probe log backend.

Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2023-08-16 21:21:55 +03:00
Seppo Ingalsuo 619477a186 App: Overlays: Add DRC component build to TGL, TGL-H, ACE
This patch adds CONFIG_COMP_DRC=y for IPC4 Intel platform
builds.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2023-07-25 15:48:08 +01:00
Peter Ujfalusi 1411dd6607 board: intel_adsp_cavs25_tglh: Disable DTRACE
DTRACE is IPC3 only, it is not used anymore.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-07-20 12:12:46 +03:00
Peter Ujfalusi df5576872f board: intel_adsp_cavs25: Disable DTRACE
DTRACE is IPC3 only, it is not used anymore.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
2023-07-20 12:12:46 +03:00
Jaroslaw Stelter 83343c51bb lnl: app: Fix configuration for D3 flow
LNL configuration must be updated to fix D3 flow
on ACE 2.0 platform.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-07-07 15:49:36 +01:00
Andrey Borisovich 965e1c1bf0 board: intel_adsp_ace15_mtpm: Enabled MTL IMR context save
Enabled CONFIG_ADSP_IMR_CONTEXT_SAVE option in Kconfig
in the board configuration.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-06-28 15:32:16 +03:00
Andrey Borisovich 80f27b2f7e board: intel_adsp_ace15_mtpm: disabled CONFIG_PM_DEVICE_RUNTIME_EXCLUSIVE
Zephyr turns on by default CONFIG_PM_DEVICE_RUNTIME_EXCLUSIVE option
what causes Devices using Zephyr Device System Power Manager to
be ignored during SoC power transition. Disabled this option so we
can use default Zephyr kernel behavior to shut down Devices.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2023-06-28 15:32:16 +03:00
Daniel Baluta 20f064749a app: boards: Remove mimx93_evk_a55_sof.conf file
We now use mimx93_evk_a55 board so there is no longer
need for mimx93_evk_a55_sof.conf.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2023-06-21 13:13:11 +03:00
Daniel Baluta c42613afd7 app: boards: Add mimx93_evk_a55 config fragment
We plan to get rid of mimx93_evk_a55_sof board and use the
generic mimx93_evk_a55 board + overlays.

This patch adds the config fragment to enable mimx93_evk_a55 board for
SOF.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2023-06-21 13:13:11 +03:00