Switches all pipelines for cAVS platforms to timer scheduling.
This way we limit the number of interrupt levels processed
in the system. Timer, IPC and IDC are already on level 2 and
DMAs are on level 5.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Changes number of SSP and DMIC DAI periods from 2 to 3.
This way we can support both timer and new single DMA
channel scheduling.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Enable setting pcm min and max rate from top level m4 pipeline macro.
This way it is possible to configure the whole pipeline to correct
samplerate range in 1 file. Previously you needed to modify the pipeline
macros where the rate was hardcoded. As the frame count is calculated
from pcm/dai rate and scheduling time the frame count is obsolete.
Introduce pipeline rate parameter to help configuring components with
fixed output rate. We can't deduce this from pcm range since for example
src might accept bigger max rate than the following dai. Even though the
parameter is named "pipeline rate" it essentially means the "final"
output rate to which this pipeline is connected to (dai or other
pipeline). In capture pipelines it means the originating fixed dai rate.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
This patch adds to all DMIC related topologies the new token
SOF_TKN_INTEL_DMIC_UNMUTE_RAMP_TIME_MS. The value is set to 400
to correspond to 400 milliseconds long unmute ramp time. The
topology defined unmute will override the firmware internal
hard coded value if it is set in topology.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The example and test topologies demonstrate new non-symmetrical
microphones/channels setup for capture via FIFOs A and B.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Tomasz Lauda