Host build should not depend on testbench symbols. Also add timestamp to
the trace log.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This patch converts the component to module API. The configuration
blob handling is also changed to model handler.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch replaces legacy component API with new module adapter
API. There are no changes to functionality.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch contains the changes to run crossover component as
module adapter client in IPC3 and IPC4 systems. The largest change
is to use pin indices in IPC4 instead of pipeline IDs to identify
sink streams. Pipeline IDs on firmware side are temporary in IPC4.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch replaces legacy component API with new module adapter
API. There are no changes to functionality.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The pcm_dev is no more used in the code. It also causes a
problem with "error: ipc get comp" with some topologies, where
p->sched_id is missing. This fix helps testbech to parse a
topology like
pcm0p --> buf2.0 --> muxdemux --> buf1.0 --> ssp0.out
^
pcm1p --> buf3.0 -------|
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
When the DMA buffer is reallocated pass the alignment argument to honor
the buffer address alignment that was used originally. Update the
buffer_set_size() to pass the requested alignment and all its users.
This is particularly needed in the case of host and DAI DMA buffers that
query the buffer address alignment from the DMA driver while allocating
the DMA buffers.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This patch cleans up SRC component. There is no need to keep
IPC3 version build with legacy component interface. The patch
mainly removes code under CONFIG_IPC_MAJOR_3 and makes some
functions available for all builds from CONFIG_IPC_MAJOR_4.
The IPC4 capture issue is fixed by using the src_init()
IPC rates for source and sink rate initialize. It needs a
similar kernel update to always set those values. In practical
topologies in prepare the buffers may not contain the correct
stream information because the order of host copier and
dai copier pipeline prepare can be host first where capture
SRC is usually placed.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch adds to rebuild-testbench option -x <platform> that
can be used to build testbench for xt-run execution. The enhanced
script reuses native testbench build but with CC, LD, LDFLAGS,
etc. defines to use the xt-xcc compiler for build.
Currently TGL (HiFi3) is the only supported platform. More will
be added later.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch avoids the build errors. Most of the issues are
from different types for formatted printing in gcc vs. xt-xcc.
The "__attribute__ ((fallthrough));" is not supported in xt-xcc.
The xtensa C library does not have clock_gettime() so it is
only left out from build. The cycles count and MCPS is printed
instead.
The include of dlfcn.h is not needed since the testbench no
more has dynamic libraries.
Structs within structs need to be initialized to zero in xt-xcc
with multiple brackets.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
In component.h the eq_iir and mixer have still the old component
API function prototypes. They can be removed as not needed. These
components do not support legacy mode.
Similar update is done to testbench common_test.h. The function
prototypes there are duplicate since they are now available in
component.h.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Strip out all the threading and cache debug to become a pure xt-run
application. This removes a lot of code, including in the host LL
scheduler.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Abstract the topology APIs to provide support for other IPC ABIs and
further simplify the codebase. Makse sure all public APIs have the tplg
prefix and make sure private APIs are in the correct places.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
This patch adds simplified linux/types.h into testbench headers
to enable include of ALSA asoc.h to build without other difficult
kernel headers content.
The CMakeLists.txt files are updated to make a build time copy of
asoc.h to subdirectory include of the build directories. The new
directory is added to headers path.
This change avoids build fail with xcc toolchain that can't use the
gcc toolchain headers from the system where the ALSA headers are
located.
Suggested-by: Marc Herbert <marc.herbert@intel.com>
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The xt-xcc compiler RG-2017.8 does not support -Wimplicit-fallthrough
option. Add to CMakeLists.txt files check for the option and use it if
it is supported.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Reduce complexity by parsing all topology objects in memory rather than
by seeking file, reading into allocated memory and then freeing memory.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
The simple {0} is not accepted by xt-xcc compiler. It gives
"warning: missing braces around initializer".
Adding sufficient number of braces to match the struct definition
fixes the build.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The purpose of this commit is to separate XTOS-specific code
from the Zephyr-specific code found in sof/schedule/task.h.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
The purpose of this commit is to separate the XTOS-specifc
code from the Zephyr-specifc code found in sof/sof.h.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
module_config contains a .data pointer that is used both for initial
and run-time configuration. The initial configuration should be
const. We add a new .init_data pointer for it.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Code can now include <rtos/alloc.h> and uses thinly wrapped Zephyr
native for most uses. Wrapping can be removed over time.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Code can now include <rtos/wait.h> and uses native Zephyr 64
cycle API instead of SOF version.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
No runtime semantic change. Use C library when RTOS uses
C library otherwise use own C library calls.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
No functional runtime change, but changes to rtos partitioning and the
layout of headers .
This patch creates RTOS specifc header paths and updates spinlock.h
and kernel.h to show the new usage. Other headers will incrementally follow.
It reuses the current zephyr topleve directory and creates a new
toplevel xtos directory for xtos specific files.
Due to the mixing of RTOS, driver and library headers at the top level include
directory it was necessary to create rtos specific header directories i.e.
src/include/rtos-xtos
src/include/rtos-zephyr
These RTOS include directories will eventually contain RTOS specific headers
whilst common logic and structures will be placed in non RTOS directories.
This will also mean
"#include <sof/spinlock.h>"
will become
"#include <rtos/spinlock.h>"
and will allow easier visualisation of where and why RTOS headers are being used.
This will help to eliminate cross usage of headers between RTOSes.
Subsequqnt patches will move more headers and rtos specific wrppaer
source files into rtos specific locations.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
This is another tplg_parser and testbench update on the road to provide
further flexibility around supporting new modules and IPC versions.
There will more to follow.
Changes are mostly mechanical code movements i.e. moving testbench related code
to the testbench, splitting the files into per module/component files and
making some functions static and public.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Use DECLARE_SOF_RT_UUID and fix the uuid name in the comp_drv for the
file component.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
The file component buffer resize was incorrect. It caused some
SRC testbench tests to fail due to insufficient sink buffer
size. The resize of file component source/sink was in prepare().
This patch moves it to one step earlier to params(). Then the
components' check for buffers in prepare() will see the impact
and let them error if the size is not sufficient.
After this change the number of periods in the buffer (from topology)
is preserved in resize. If a test does not run, need to fix the
test topology.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch adds load possibility of mux, demux, and
google-rtc-audio-processing to testbench.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch changes testbench to retrieve pipeline direction
from pipeline host direction. Earlier all pipelines were forced
to playback.
The topology parsing filters the parsed pipelines to command line
specified pipeline IDs. All the pipeline operations are done
looped to these pipelines to be able to simulate multiple simultaneous
pipelines.
The pipeline context struct remains single. So the simulation works
only for pipelines with identical PCM format and rate.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
No functional change.
Move some common testbench code into the topology parser and group
feature parsing by file name.
Add a tplg_ prefix to external APIs without a prefix, others with an
existing prefix to follow this change.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Add option to override how a core id, specified in SOF topology, is
mapped to host core. This allows to map a multithreaded pipeline
execution to specific range of host CPUs.
Implement the option via environment variable "SOF_HOST_CORE0", which is
understood by the CONFIG_LIBRARY implementation of ll-scheduler.
Document the usage to testbench help. mapping of DSP core ids specified
SOF_HOST_CORE
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The testbench currently has a global structure that contains
per topology and per pipeline data. Refactor to move data to the
most appropriate structure for use.
This is not the final fix, further refactoring is needed.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
This patch changes the help print function. The print look and details
are improved. Executable behavior with option -h is fixed. Previously
the help text was printed twice.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This is the first step in running a full DSP topology on multiple testbench
"virtual" cores. Testbench will use threads to virtualise a emulate a core
allowing topologies with more than one core to run simultaneously.
This patch makes the following changes.
1) Adds and passes a topology testbench context to all APIs instead of
relying on some globals.
2) Splits the testbench up into small functions that have a single purpose.
3) Creates a thread for each pipeline which in turn share a virtual core.
4) Adds the command line options to enable testing different cores and
pipelines.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Split pipeline functionality into smaller action to support more
complex use cases. Provide more useful logging.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Liam Girdwood