Commit Graph

10 Commits

Author SHA1 Message Date
Liam Girdwood d9f9340e1a tplg_parser: split out testbench logic and partition features per file.
This is another tplg_parser and testbench update on the road to provide
further flexibility around supporting new modules and IPC versions.
There will more to follow.

Changes are mostly mechanical code movements i.e. moving testbench related code
to the testbench, splitting the files into per module/component files and
making some functions static and public.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2022-08-29 14:11:29 +01:00
Liam Girdwood 0db4a82964 tplg parser: refactor and cleanup part 1
No functional change.

Move some common testbench code into the topology parser and group
feature parsing by file name.

Add a tplg_ prefix to external APIs without a prefix, others with an
existing prefix to follow this change.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2022-03-24 16:54:40 +00:00
Liam Girdwood 28761ec8ab testbench: add support for virtual cores as threads
This is the first step in running a full DSP topology on multiple testbench
"virtual" cores. Testbench will use threads to virtualise a emulate a core
allowing topologies with more than one core to run simultaneously.

This patch makes the following changes.

1) Adds and passes a topology testbench context to all APIs instead of
   relying on some globals.

2) Splits the testbench up into small functions that have a single purpose.

3) Creates a thread for each pipeline which in turn share a virtual core.

4) Adds the command line options to enable testing different cores and
   pipelines.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2022-01-31 16:16:27 +00:00
Diana Cretu 3b3d0ae2eb fuzzer: Add initial support for i.MX8 platform
Implement the fuzzer API for the i.MX8 platform. The difference
between other platforms and i.MX8 is the Messaging Unit(MU). We have
emulated the hardware functionality of MU by using SHMs to represent
Side A and Side B of the MU and the registers they each have. Both
qemu(VM) and fuzzer's write functions write to both sides of the MU to
successfully emulate it's functionality.

Signed-off-by: Diana Cretu <diana.cretu@nxp.com>
Signed-off-by: Shreeya Patel <shreeya.patel23498@gmail.com>
2020-08-10 10:44:30 +01:00
Liam Girdwood 25c8990d39 fuzzer: add BSW platform and fix fw_ready for CHT.
CHT was missing fw_ready callback. Add BSW platform.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2019-09-20 10:09:17 +01:00
Liam Girdwood 224f177020 fuzzer: add support for HSW and BDW platforms.
Can now send fuzzing IPCs and topologies to HSW/BDW VMs.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2019-09-20 10:09:17 +01:00
Liam Girdwood bf72bf7a7b fuzzer: cleanup mailbox platform abstraction
Pass mailbox as parameter and add convenience helper for platform ops.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2019-09-20 10:09:17 +01:00
Liam Girdwood 29a9b9d529 fuzzer: add more logging and cleanup printf
provide more detail to the user and print to stdout.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2019-09-20 10:09:17 +01:00
Liam Girdwood 8cd194e624 fuzzer: fix fuzzer hardcoding of topology.
Command line option was ignored. Fix it.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2019-09-20 10:09:17 +01:00
Ranjani Sridharan 2f9b43bac0 tools: fuzzer: Introducing ingredients for fuzzing in SOF
This commit introduces the ingredients required for adding
fuzzing support in SOF. The main ingredients are as follows:

QEMU bridge: This creates the IO bridge to communicate with
the QEMU DSP

Core IA host support for BYT/CHT platforms: Provides the host
support for intializing the platform and communicating with
the QEMU DSP

Main application: The fuzzing application that sets up the
platform and initializes the communication with the QEMU DSP

Currently, running the fuzzer application only sets up the
platform IO bridge for communicating with the QEMU DSP,
boots the FW, parses the topology file and sets up the components
and connections in topology by sending the IPC messages to
the QEMU DSP. The next step is to add the fuzzing component
which will be responsible for sending fuzzed IPC messages
and monitoring the status.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2019-08-07 08:47:58 +02:00