Fixed the build error of multiband_drc_find_proc_func_pass and
multiband_drc_find_proc_func defined but not used.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
Codecs which apply to CADENCE API don't have any means
of reset, therefore we need to rework the reset procedure
so cadence codecs can remove all memory allocated by itself
and re-initialize again.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch makes codec_free_all_memory() available for codecs so they
can free all memory allocated by themself.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch increases buffer periods of all components on a
post processing pipeline. This is needed because post processing
may introduce deep buffering and hence needs more space in its
buffers.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch refactor codec adapter's .copy() function
so it makes use of local buffer and the deep buffering
feature. Now, whenever deep buffering is needed we perform
processing as usual but store it in local buffer until we
gather enough samples to start copying them down/up the pipeline.
The important new feature, introduced by this commit is zeroes
generator during deep buffering time. This is needed so the next
processing component won't classify our buffering time as an XRUN.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch adds local buffer to codec adapter. The aim of
this buffer is to damp any irregularity between pipeline
and codec. The difference in buffer sizes is one of the
examples here - thanks to additional local buffer we can
call codec processing several times during one period or
we can store several pipeline periods in local buffer and
process them once.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch introduces deep buffering for codec adapter.
This is needed when codec input buffer is not a natural multiple
of pipeline buffer. In such situation codec adapter won't be able
to produce samples every n period. Hence we "deep buffer" samples
during startup (typically few periods, depending on the difference
between pipeline buff and codec buff) so once we gathered enough
samples to regularly produce output we start processing.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
The runtime_params keeps configuration of codec therefore
codec_data structure is a better place to store it.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch updates the .params() method with verification of runtime
parameters and stores them in component data for future use.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
This patch will prevent from enabling pm_runtime dsp at the end of draining
to avoid enabling it when already received disable ipc during draining
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
When scanning all channels for a certain task we end up comparing
with a null task.
That's because we have multiple channels (e.g. 32 for i.MX) but only
some of them are used in certain scenarios. For example, for simultaneous
playback/capture we use only 2 DMA channels.
To fix this, validate task before using it.
Fixes#3690
Fixes: 647390f75e ("schedule: dma_multi_chan: fix a DMA channel interrupt race")
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
To reduce the power consumption, we should request the clock source for
bclk only when SSP is active. This means we need to postpone the clock
request from ssp_set_config() to ssp_pre_start() and release it at
ssp_post_stop().
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Create ssp_pre_start/stop() helpers to do kinds of runtime
configuration, and do the bclk request/release there to make sure the
bclk source is hold only when the DAI is active, this will help for
power saving at SSP idle.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
During mn_release_bclk(), check if there is still any SSP which is
holding the M/N clock source, if no, release the clock source for power
saving.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Add a helper to reset the bclk M/N source (MNDSS), which will help to
release the clock source when it is not needed.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Currently the mux/demux uuid setting doesn't work and uuid is always set
to "demux". Fix this by quoting the ifelse in 1 line.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
According to spec, we can configure more devidier ratios via register
MDIVR, in 1/N the N could be 2, 3, 4, 5, 6, 7, 8.
Here change to enable these possibilities.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
The ssp.freq is arranged in ascending sequence, to get the smallest
matched clock, we should search from index 0.
We should not stop the searching if 'mclk < ssp.freq', continue the
searching until we get a larger/proper one or fail if all the items
are iterated.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Log the incorrect mdivr_val value when error happen, which could help to
identify what has happened.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
This patch fixes the issue with premature free of runtime
parameters memory. Such situation occurs when runtime
params are send in few parts, then after the first packet
has been copied the memory is freed so the consecutive one
no longer has a copy destination.
Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
alloc_heap_buffer() is trying to allocate memory from a single heap,
no need to check its size on each iteration of an internal loop over
maps.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
With coefficients scaling that creates above 1.0 absolute value
internal biquad output before scaling gain and shift there's
overflow in variable tmp calculation that is used for output
and for recursive a1, a2 coefficients multiplication.
Fixes: #3678
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
for some reason the clang version with oss-fuzz doesn't recognize the
comments so lets add this attributes in the meantime. XCC does not like
them so lets only use them with clang.
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
This fix adds initialization and declaration of variable f_single
to avoid a previously overlooked error when accessing it in the
end of script. It produces the plot but with a warning print.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Add m4 macros to generate enumerated control. Usage is similar to mixer
and bytes control except enumerated values are specified using separate
text section.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
There are simply a dump of a series of messages from the kernel of
messages sent to the firmware. This will be used by the fuzzer to infer
inputs to tests against the the firmware.
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Trace is enabled by default for library builds, but the module is not
included. This breaks the ipc handler. Therefore lets include it and
give it a mocked section of memory to write to.
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
The fuzzer is makings its way into a lot places where we assume hw
configs exist. Therefore a refactor is needed make it easy to fill in
the missing configs.
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Some algorithm functions of crossover and drc are exposed to share the
usage from other components, e.g. a multi-band drc which includes
crossover and drc inside.
Signed-off-by: Pin-chih Lin <johnylin@google.com>
Use an upstream commit instead for developing commit.
Included following feature:
rimage cavs 2.5 support
add verify feature
rimage support for TGL-H
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
To support TGL-H build with different binary name, set
CONFIG_RIMAGE_SIGNING_SCHEMA to tgl-h to make sure
output file name matches requirement from Linux driver
Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Both the playback and capture PCMs should be restricted to the
corresponding SMART_PB_CH_NUM and SMART_REF_CH_NUM, as running them with
other channel numbers will not work correctly.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
ILL entries in the DW DMA driver are accessed both by the controller,
using DMA and by the DSP. For this to work the DSP has to force cache
synchronisation appropriately. Therefore the ILL area has to be
allocated with cache-line size alignment. This isn't the case with the
Zephyr allocator. This patch switches allocation from rmalloc() to
rballoc() to force such alignment. Eventually a generic fix will be
implemented in an SOF wrapper fpr the Zephyr allocator.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The set of figure property in figure() command is not supported
in Matlab. The separate set() property works for both Octave and
Matlab.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Add a macro 'CODEC' to generate topology for rt1011 speaker amp.
Add a macro 'FMT' to seperate speaker dai format: s16le, s24le
Modify both pcm name by 'Speakers'
Signed-off-by: Brent Lu <brent.lu@intel.com>
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
This rounds up the page table DMA transfer size to DMA_ATTR_COPY_ALIGNMENT
instead of a hard-coded 4 bytes.
Signed-off-by: Joseph Burt <caseorum@gmail.com>
This was too small, causing the ptable to be truncated and the
ptable DMA transfer to fail on BDW for small buffers, where the
minimum transfer is 4 bytes.
Signed-off-by: Joseph Burt <caseorum@gmail.com>
Speaker amp's SSP tdm & clock is configured for 32-bit, accordingly
update DAI configuration to s32_le.
Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Currently we are checking if matrix row contains any 1's (popcount). In
mux case this doesn't tell us if channels are mixed. For example if we
have 2 input matrix in which first row's position 2 and 4 have value 1,
it means that both streams channel 1 is copied to output channels 2 and
4, so not mixed. So change the check to be channel specific.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Pin-chih Lin