Add an argument to specify if we want to build the HDMI only topology.
To build the HDMI only topology, use the following command:
alsatplg -p -c cavs-gain-hdmi.conf -o cavs-gain-hdmi.tplg
To build the HDA topology use the following command:
alsatplg -D HDA_CONFIG="gain" -p -c cavs-gain-hdami.conf -o
cavs-gain-hda.tplg
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Add the host<->gain route in the gain-playback/gain-capture
pipeline and keep only the top-level routes in the top-level topology
file.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Zephyr commit 174cb7f9f183 switched 'atomic_t' from 'int' to
'long' and broke SOF compilation as shown below.
Recent SOF commit 970d7d61ec ("zephyr: update print messages for
64-bit atomics") switched all atomic_read() logs to "%ld" instead of
"%d" which fixed compilation with Zephyr after the switch but broke it
with Zephyr _before_ the switch.
This no-op (long) cast makes SOF compatible with Zephyr both before and
after the switch.
Note the sof-logger does not make any difference between %ld and %d and
does not care.
Sample failure:
src/lib/dma.c: In function 'dma_get': sof/src/include/sof/trace/trace.h:290
error: format '%d' expects argument of type 'int', but
argument 5 has type 'atomic_val_t' {aka 'long int'} [-Werror=format=]
290 | printk("%llu " format "\n", platform_timer_get(NULL), \
| ^~~~~~~
sof/src/lib/dma.c:119:2: note: in expansion of macro 'tr_info'
119 | tr_info(&dma_tr, "..., busy channels = %d", atomic_read(...))
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
In schedule_ll_client_reschedule(), we only need to check those tasks
who ask for rescheduling, for others (e.g. _COMPLETED ones), we should
not take them into account for next_tick calculation.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
This patch adds method tdfb_params() where comp_verify_params() is
called with BUFF_PARAMS_CHANNELS. With it the TDFB can get the
different channels count buffers for source and sink and initialize
correctly.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Linear link position is updated in llp register by GP-DMA
hardware. Now it is enabled by SOF FW but not used.
This patch set up a path to read it and update it to host
driver.
Signed-off-by: Rander Wang <rander.wang@intel.com>
No functional change, only fix an ASCII-art topology representation
in a comment.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
For secondary core target IPC, the IPC handling could be completed on a
secondary DSP core, while the primary core may be in handling an reply
message from the host and touching the IPC_DIPCCTL at the same time, so
there is race condition from different DSP cores in this scenario, and
that actually lead to kinds of IPC timeout as setting of bit
IPC_DIPCCTL_IPCTBIE could be ignore and busy interrupt will be disabled
after that.
Simply holding of ipc-lock in the irq handler fixes the issue, according
to stress test with multicore scenarios.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
The DSP->Host messages are sent in the EDF main task already, the one
more try in the IPC handler is superfluous, remove it.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
In multi-core cases, the IPC could be handled by a secondary DSP core,
which means we need to use ipc_processed_counter with coherent access,
otherwise, the counter may be calculated wrongly.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Allocate comp_dev on buffer zone with uncached address to rule out
multi-core cache coherency issue, may need to implement coherent API for
it if it is proved lead to too much performance drop with the change.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
ll_scheduler tasks run audio pipelines on multiple cores in parallel.
Starting and stopping those tasks can cause access to global domain
data. That data has to be protected by the domain lock.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
We're now making sure that all ll-scheduler tasks under Zephyr are
only ever accessed from their specific core, tasks to be run on core
1 aren't scheduled or cancelled from core 0, etc. Therefore it isn't
necessary any longer to use a spinlock to protect scheduler data,
just disabling interrupts is enough.
This also fixes a dead-lock on secondary cores. When the last task on
core exits, the respective scheduler thread terminates, and that
happens while it's still protecting the scheduler data. Therefore if
a spinlock is used, trying to take it again after that dead-locks the
core.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
All LL-scheduling calls (scheduling a task, cancelling a task, etc.)
should only be done from the respective core. Add an assert() to
guard against violations.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Zephyr ll-scheduler locking implementation can change, abstract
spin-lock calls into new functions to simplify such changes.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This patch adds two included header files format_generic.h and
format_hifi3.h. The latter contains intrinsics operations
optimized versions of 16, 24, and 32 bit saturations. Generic
header contains the previous C versions those will be used
for anything else but xt-xcc HiFi3 compatible build.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
The lli structs are used by both DSP and DMAC, allocate them from the
runtime_shared heap to avoid being corrupted by cache writing back.
This helps to fix a lot of DMA xrun issue according to the validation.
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Recently SOF IPC processing has been modified on multicore systems
to let secondary cores reply to IPCs if the primary core has already
left the IPC forwarding context. This hasn't been implemented for
Zephyr which led to unanswered IPCs and IPC timeouts on the host.
This patch lets secondary cores reply to IPCs under Zephyr.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Atomics will use `long` rather than `int` so that they are 64-bit
on 64-bit builds and 32-bit on 32-bit builds.
Required by zephyrproject-rtos/zephyr#39531
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
A recent commit moved START and RESUME trigger processing to the
pipeline task for timer domain pipelines. This patch does the same
for STOP and PAUSE.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Currently there are two ways to stop scheduling an LL task: by
cancelling it from outside and by returning SOF_TASK_STATE_COMPLETED
from the task .run() function. In both cases the task will stop being
rescheduled, but in the latter case it will stay on the list of the
tasks, waiting to be cancelled. This means that even for those tasks
schedule_task_cancel() still has to be called. This is however
inconvenient because in some cases there is no suitable context to
cancel that task from. E.g. this will be the case with pipeline tasks
when we switch them over to handling STOP and PAUSE commands from the
task itself.
This patch restores the original behaviour when tasks are removed
from the list after completion, without waiting for cancellation.
For this we extend the calling convention of domain_unregister() to
be used with the task parameter equal to NULL when freeing the
scheduler. DMA domains preserve their current behaviour: they ignore
calls with task == NULL. The timer domain however now uses this call
to release the timer interrupt.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
struct ll_schedule_domain::registered[] is only used inside
ll_schedule_domain.h and only to update itself, it's exclusively
self-serving. Remove it.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Currently -EINVAL is used to indicate an invalid trigger code,
requiring no handling. Use an explicit new COMP_TRIGGER_NO_ACTION
value for that for better clarity.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This patch fixes the DMIC blob parser for cases where channel_ctrl_mask
and pdm_ctrl_mask differ from usual values 0x3. If channel_ctrl defines
only single FIFO with value 0x1 or 0x2 the appropriate FIFO0 or FIFO1
gets the configuration. Similarly if pdm_ctrl_value is 0x2 the blob
contains configuration data only for PDM1.
Previously such blobs caused incorrect DMIC HW configuration. Since the
appropriate HW resource programming is achieved by looping all controllers
in HW the data structures for non-defined remain NULL. Some checks against
null pointer reference need to be added to prevent corrupt blob from
causing FW panic.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch adds check for BFTH value in the blob. Applying higher
than supported FIFO depth would result to capture fail due to xruns.
This patch also changes some important traces from dai_dbg() to
dai_info().
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch replaces the hard-coded value 8 with DAI platform data
FIFO depth. The depth is set by DMIC driver in set_config() from
BFTH^2 value. The BFTH value is hard-coded to driver in topology
params mode (8) or retrieved from blob OUTCONTROLx register setting
in blob mode.
If the blob set BFTH was different than hard-coded the capture resulted
to xruns and failure.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This patch fixes the value get from current pdm_cfg[n] instead of
first pdm_cfg[0]. It impacts case where PDM0 is omitted from blob
or in case of different registers values for PDM0 and PDM1.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
Add io_clk attribute to dmic and ssp dai class. This is the platform
dependent clock that needs to variated in upper level topology files.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
Ranjani Sridharan