Commit Graph

14 Commits

Author SHA1 Message Date
Guennadi Liakhovetski 7b5d1bbe39 test: add boot-time ztest-based testing
Add a ZTEST test-suite to run SOF boot-time self-tests at the time of
the first FW_GEN_MSG IPC.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
2023-12-08 15:29:06 +02:00
Serhiy Katsyuba 88b609ed07 ipc4: Add cross-core binding support
Implements binding of two pipelines from different cores so stream could
travel cross-core.

Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2023-10-25 10:57:53 +03:00
Laurentiu Mihalcea b185ffa6b8 zephyr_dma_domain: Give semaphore resources based on sched_comp's state upon cancel
This implies the following changes:
	1) domain_task_cancel() shall no longer receive the number
	of tasks, but, instead, will receive the task to be cancelled.

	2) zephyr_dma_domain_task_cancel() will do k_sem_give() if the
	sched_comp associated with the given task is != COMP_STATE_ACTIVE.

	3) SEM_LIMIT is changed to CONFIG_DMA_DOMAIN_SEM_LIMIT and can
	be configured.

The reasoning for the changes are the following:
	1) and 2): In the case of mixers, domain_task_cancel()'s
	num_tasks is not a reliable way to determine if the DMA
	IRQs got cut off. Let's consider the following scenario:

	We have a mixer with 1 non-registrable pipeline task and
	1 registrable pipeline task. Upon TRIGGER_STOP we'd have
	the following flow (i.MX boards):
		a) SAI_STOP => DMA IRQs get cut off.
		b) Cancel non-registrable pipeline task.
		c) Cancel registrable pipeline task.

	During b) and c), domain_task_cancel() would get the following
	arguments:
		b) domain_task_cancel(sch, 1)
		c) domain_task_cancel(sch, 1)

	This is because the non-registrable pipeline task wasn't
	dequeued before c) so, even though the DMA IRQs got cut
	off during a), zephyr_dma_domain_task_cancel() does not give
	resources to the semaphore so what happens is zephyr_ll_run()
	will no longer execute and the pipeline tasks remain queued.

	3) Since the semaphore can accumulate more than 1 resource
	at a given time (and since it's safe to make SEM_LIMIT depend
	on the load of the system), SEM_LIMIT was changed into a config.
	This allows the user to change SEM_LIMIT based on the system
	load. For example, if there's 2 non-registrable pipeline tasks
	and 1 registrable pipeline task (same scheduling component),
	an appropriate value for SEM_LIMIT should be 3 (since the
	semaphore can be given at most 3 resources during the task
	cancellation process). Of course, making SEM_LIMIT depend on
	the system load is the worst case but this way we can make sure
	that the cancelled tasks get dequeued properly.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-05-16 14:01:23 +03:00
Marcin Szkudlinski 85b4cdd6c5 kconfig: limit DP scheduler to ACE
DP scheduler is intended to work on MTL and
future platforms only - has not been tested on
any legacy.

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2023-04-25 13:23:28 +03:00
Daniel Baluta 3f3c1e5084 zephyr: Make CONFIG_DMA_DOMAIN no longer experimental
DMA domain with Zephyr works fine for i.MX platforms. So, remove
"experimental" from description and enable it by default for i.MX
platforms.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2023-04-05 12:31:46 +01:00
Marcin Szkudlinski 62e358231e kconfig: add DP_SCHEDULER kconfig def
some platforms don't use Zephyr, therefore they can't
use DP scheduler. Add a config option

Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
2023-03-14 14:00:28 +00:00
Laurentiu Mihalcea 1daedbf646 Introduce Zephyr DMA domain as experimental feature
This series of changes allows developers to enable DMA
domain on Zephyr. Currently, this feature is marked as
experimental because it still requires a lot of testing
and bug fixes.

In the case of i.MX, these changes still allow the usage
of dma_multi_chan_domain in conjunction with ll_schedule
if so desired. This is done because the feature is still
experimental and once it becomes more stable the appropriate
changes will be done in order to make DMA domain the
default option.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2022-11-02 12:34:34 +00:00
Adrian Warecki 784bce763c mtl: Added meteorlake platform to the build system
Added new mtl platform to xtensa-build-zephyr.py.
Added ace directories to cmake files.
Added ACE to kconfig.
Add Meteorlake platform to be built with Zephyr under
CONFIG_ACE_VERSION_1_5 flag.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-09-21 15:15:26 +02:00
Liam Girdwood 1629a1f72c header: rtos: decouple headers into rtos specific directories.
No functional runtime change, but changes to rtos partitioning and the
layout of headers .

This patch creates RTOS specifc header paths and updates spinlock.h
and kernel.h to show the new usage. Other headers will incrementally follow.
It reuses the current zephyr topleve directory and creates a new
toplevel xtos directory for xtos specific files.

Due to the mixing of RTOS, driver and library headers at the top level include
directory it was necessary to create rtos specific header directories i.e.

src/include/rtos-xtos
src/include/rtos-zephyr

These RTOS include directories will eventually contain RTOS specific headers
whilst common logic and structures will be placed in non RTOS directories.

This will also mean

"#include <sof/spinlock.h>"

will become

"#include <rtos/spinlock.h>"

and will allow easier visualisation of where and why RTOS headers are being used.
This will help to eliminate cross usage of headers between RTOSes.

Subsequqnt patches will move more headers and rtos specific wrppaer
source files into rtos specific locations.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
2022-08-31 12:01:07 +01:00
Adrian Bonislawski 2b7fdc95de dma: add Zephyr native DMA support to host & dai
This patch will add new versions of host and dai components
with Zephyr native DMA support

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-05-31 15:28:27 +01:00
Kai Vehmanen 9567c97fb3 zephyr: enable cached heap by default for Intel cAVS platforms
Set default as yes for SOF_ZEPHYR_HEAP_CACHED for Intel cAVS.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2021-10-15 09:28:28 +01:00
Kai Vehmanen 956a587663 zephyr: reimplement cached heap zone on single Zephyr sys_heap
Implement the cached SOF heap zones using a single sys_heap
object.

Compared to old implementation which used two separate sys_heaps,
this implementation enables dynamic cached/uncached partitioning
of the heap.

To ensure coherency of the Zephyr heap operation, if cached heap
is enabled, all allocations must be aligned to dcache linesize.

Add a Kconfig option CONFIG_SOF_ZEPHYR_HEAP_CACHED to turn on/off
the cached heap logic, with default set to no for all platforms.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2021-10-15 09:28:28 +01:00
Anas Nashif d486a9ff98 kconfig: allow SOF Kconfig to be included in other projects
When the SOF Kconfig is included in other projects, the main menu should
not be that of SOF, rather it should be of the project including SOF.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-08-04 12:34:39 +01:00
Anas Nashif a97d166121 zephyr: reference local Kconfig
Reference Kconfig in zephyr module file which is evaluated by Zephyr
directly. This will eliminate the need for including the SOF Kconfig
directly.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-11 20:19:15 +00:00