The driver configures a lowest feasible bus clock to save power.
Since the 48 kHz and 16 kHz DMIC DAI can now be instantiated in the
runtime there is possibility that the min. 500 kHz clock allowed could
be too low for a new 48 kHz capture when existing 16 kHz capture is
running.
The topologies those define a 48 kHz DMIC DAI need to increase the min.
clock to a sufficient rate. This patch changes every 500 kHz value to
2.4 MHz. This change does not change the external microphone clock in
any platform. The lower than 2.4 MHz clock rates never happened in
previous version to due to the 48 kHz DAI request in these topologies.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
DMIC01 is just useless for a user. After multiple rounds of
discussion, we agreed to remove numbers (which could be understood as
a mic position) or a frequency (which is misleading since it can be
updated to e.g. 96kHz by topology), so by default the DMIC interface
is called just that...
Conversely, we add a clear 16kHz qualifier for the low-frequency
path. While in theory the frequency can be changed with modifications
of the FIR filter, applications do need 16kHz support.
Also make sure we only use 'DMIC' for 'PCH-attached DMICs'. For
RT715-based solutions, the microphones can be analog, so use more
generic 'Microphones' description.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reverts all previosly changed cAVS pipelines from 3 to 2 periods.
Now we have separate buffers for DMA, so there is no need to make
DAI buffers consist of 3 periods. DMA will take care of any internal
hardware requirements.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Switches all pipelines for cAVS platforms to timer scheduling.
This way we limit the number of interrupt levels processed
in the system. Timer, IPC and IDC are already on level 2 and
DMAs are on level 5.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Changes number of SSP and DMIC DAI periods from 2 to 3.
This way we can support both timer and new single DMA
channel scheduling.
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Enable setting pcm min and max rate from top level m4 pipeline macro.
This way it is possible to configure the whole pipeline to correct
samplerate range in 1 file. Previously you needed to modify the pipeline
macros where the rate was hardcoded. As the frame count is calculated
from pcm/dai rate and scheduling time the frame count is obsolete.
Introduce pipeline rate parameter to help configuring components with
fixed output rate. We can't deduce this from pcm range since for example
src might accept bigger max rate than the following dai. Even though the
parameter is named "pipeline rate" it essentially means the "final"
output rate to which this pipeline is connected to (dai or other
pipeline). In capture pipelines it means the originating fixed dai rate.
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
This patch adds to all DMIC related topologies the new token
SOF_TKN_INTEL_DMIC_UNMUTE_RAMP_TIME_MS. The value is set to 400
to correspond to 400 milliseconds long unmute ramp time. The
topology defined unmute will override the firmware internal
hard coded value if it is set in topology.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
remove the HDA_DAI_CONFIG macro and reuse the DAI_CONFIG
macro with type HDA. This will ensure the hw_config
section gets added for HDA dai's as well.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Seppo Ingalsuo