Commit Graph

170 Commits

Author SHA1 Message Date
Tomasz Lauda 1280987999 topology: use DAI_PERIODS in calculation of DAI buffer size
Uses DAI_PERIODS in calculation of DAI buffer size.
In case the DAI_PERIODS value is undefined, we use
DAI_DEFAULT_PERIOD value of 2.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-11 14:17:29 +02:00
Tomasz Lauda 3b90d1e9a5 topology: pipeline: add missing undefine
Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-11 14:17:29 +02:00
Tomasz Lauda e56c517a5b topology: use passed DAI_PERIODS
Fixes pipe-dai-capture and pipe-dai-playback pipelines
to use passed DAI_PERIODS value instead of hardcoded.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-11 14:17:29 +02:00
Jaska Uimonen fe68e9b9fe topology: rename dmic pga and control names in capture eq pipe
Rename dmic pga and control names to human readable format as they might
be used by user space software.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-10-09 15:54:52 +02:00
Jaska Uimonen 74a4cfe2d7 topology: enable override of pga and mixercontrol names
Currently m4 parses pga and mixercontrol topology names partly from
static strings, pipeline id's and user defined names. This automagically
differentiates the pga's nicely, but makes some pga control names human
unreadable and error prone for example to to pipeline id changes. So
make it possible to define the pga and control name with PGA_NAME and
CONTROL_NAME.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-10-09 15:54:52 +02:00
Daniel Baluta c8bc4b2c67 topology: Add topology for i.MX8QXP with cs42888 codec
This pipeline adds support for S24_LE, 2 channels, 48KHz playback.

cs42888 codec is connected to i.MX8QXP board on ESAI0 interface
as follows:
i.MX8QXP CPU board <--> i.MX8 base board <-> Audio I/O card
(setup similar with i.MX8QM, so this topology can be used as it is
on i.MX8QM in the future).

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2019-10-08 17:51:10 +03:00
Jaska Uimonen 6ff30f4fc5 topology: change 50kHz topology to use volume component
Currently having different amount of periods between DAI and the
component before it is not allowed. This is because it is not allowed to
resize dma connected buffers. So make 50kHz topology use src-volume
pipeline, which has additional volume component, which in turn has
correct amount of periods for the DAI connection.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-10-07 12:23:22 +02:00
Daniel Baluta 680eb9ce7b topology: Add nocodec topology for i.MX8QXP
i.MX8QXP has one ESAI interface. Create a simple topology
without a codec for playback of 2 channels, 16bits samples
at 48Khz.

Host -> Buffer0 -> Volume -> Buffer1 -> ESAI0

This is useful for testing various components like Dummy DMA,
EDMA and ESAI drivers.

For more information about ESAI you can read i.MX8QXP RM at:
https://www.nxp.com/docs/en/reference-manual/IMX8DQXPRM.pdf

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2019-10-05 01:09:29 +03:00
Daniel Baluta bfb245e080 topology: Add i.MX8QXP platform info
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2019-10-05 01:09:29 +03:00
Daniel Baluta 03c6d027b8 topology: Add ESAI related utility macros
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2019-10-05 01:09:29 +03:00
Daniel Baluta ab0847d5d2 topology: Add ESAI tokens
Only add ESAI MCLK ID token for now

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2019-10-05 01:09:29 +03:00
Daniel Baluta 1adc257ff7 topology: Extend DAI_CONFIG to allow ESAI DAI
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
2019-10-05 01:09:29 +03:00
Bard Liao 2b4b40587c topology: fix hdmi topology issue for SdW projects
Somehow there is an extra "48" in  DAI_ADD() and it uses wrong
pipeline in PCM_PLAYBACK_ADD().

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
2019-10-04 14:51:42 +02:00
Bard Liao 611afaf8f6 topology: add hdmi support for sof-icl-rt711-rt1308-rt715
sof-icl-rt711-rt1308-rt715-hdmi.m4 is based on sof-icl-rt711-rt1308
-rt715.m4 with hdmi supported.

Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
2019-10-04 14:51:42 +02:00
Sathya Prakash M R 7663447632 topology : update max98357a configuration in CML
With m/n divider support, we can now support 24 bit/ 48k
on max98357a.
Add check to only use update BCLK if m/n support is present.
Else fallback to older settings.

Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com>
2019-09-27 16:36:02 +01:00
Sathya Prakash M R f0264aa0c5 topology: Add CML topology support for rt1011 SPK AMP
Add rt1011 speaker CML Audio topology on top of
sof_rt5682 where RT1011 is configured as
TDM 4 SLOT ( 2 CH PB and 4 CH Feedback), 100 FS BCLK.
BCLK delay is added for supported ABI versions.

Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com>
2019-09-27 16:36:02 +01:00
Sathya Prakash M R 61d153bbe3 topology: Add ABI version utilities
Some of the features on topology need to have
ABI version check. This adds few definitions to
check ABI version being 3.9 or more.

Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Sathya Prakash M R <sathya.prakash.m.r@intel.com>
2019-09-27 16:36:02 +01:00
Pierre-Louis Bossart b5f26539de topology: add topology for Up board w/ Hifiberry DAC+ using 50kHz SRC
The PCM512x requires 32-bit data words, so the only solution is to use
a 3.2MHz bit clock and a 48->50kHz SRC.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-09-27 16:33:17 +01:00
Sathyanarayana Nujella 7046e849cb topology: tgl_rt1308: update link_id's for iDisp Dai Config's
Update the topology to use the same iDisp link_id's as in
tgl-rt1308 m/c driver.

Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com>
Signed-off-by: Jairaj Arava <jairaj.arava@intel.com>
2019-09-26 10:15:25 +02:00
Curtis Malainey 0b4712906d topology: sof-cht-max98090 reduce buffer size of media pipeline
Reduce size of buffers so dsp doesn't run out of memory on topology load

Signed-off-by: Curtis Malainey <cujomalainey@google.com>
2019-09-20 16:58:44 +02:00
Curtis Malainey aa3b18ed71 topology: sof-cht-max98090 move DAI definition above media pipeline
The DAI definition needs to come first otherwise the media pipeline with
be parsed incorrectly resulting in a failure to load the topology

Signed-off-by: Curtis Malainey <cujomalainey@google.com>
2019-09-20 16:58:44 +02:00
Curtis Malainey 1571af188b topology: cht-max98090 add missing virtual widgets
Topology will fail to probe without these widgets

Signed-off-by: Curtis Malainey <cujomalainey@google.com>
2019-09-20 11:44:19 +02:00
Tomasz Lauda 0ba3fec518 topology: byt: fix media pipeline period for nocodec
Fixes media pipeline period for nocodec byt and cht topologies.
Now codec and nocodec topologies are aligned in regards to pipe
configurations.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-09-16 16:14:59 +02:00
Tomasz Lauda 5bb4ce172c topology: remove accidentally added topologies
Removes topologies, which have been removed and accidentally
added again to the repository.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-09-16 16:14:59 +02:00
Pan Xiuli b899489e49 topology: fix wrongly used SCHEDULE_DEADLINE
SCHEDULE_DEADLINE is replaced with SCHEDULE_PERIOD, but there is one
missed in DAI_ADD for W_PIPELINE.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2019-09-11 14:48:46 +02:00
Pierre-Louis Bossart ba32f4ad0b topology: SoundWire topologies for CML and ICL
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
Signed-off-by: Slawomir Blauciak <slawomir.blauciak@linux.intel.com>
2019-09-05 15:49:46 +02:00
Curtis Malainey 514857912e topology: sof-cht-max98090: fix media pipeline
Need to add the SCHED_COMP name so pipeline will properly load

Signed-off-by: Curtis Malainey <cujomalainey@google.com>
2019-08-31 18:57:31 +01:00
Jaska Uimonen 39ed9d6e1f topology: set glk kwd pipeline rate to 16kHz
Currently glk kwd pipeline is set to run at 48kHz. This rate is wrong
and will create too big buffers and we will run out of memory. So set
the kwd pipeline rate to 16kHz.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-08-30 11:29:00 +02:00
Pan Xiuli 8d0e863afc topology: add tgl_rt1308 with no hdmi
Enable tgl_rt1308 topology with RT1308 speaker and DMIC01.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2019-08-28 12:20:20 +02:00
Pan Xiuli d3b2fa0249 topology: add tgl_rt1308 topology
Add tgl_rt1308 topology with RT1308 speaker, DMIC and 4 HDMI.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2019-08-28 12:20:20 +02:00
Pan Xiuli 3f4c3c8286 topology: add tigerlake nocodec support
Enable SSP0/1/2 and DMIC01 nocodec topology for tigerlake.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2019-08-28 12:20:20 +02:00
Pan Xiuli 381063d266 topology: add tigerlake platform info
Modify from icelake.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2019-08-28 12:20:20 +02:00
Pan Xiuli a704c7a5a6 topology: add virtual routes for hda-idisp
Add missing virtual routes that will fail the probe.

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
2019-08-27 09:27:05 +02:00
Jaska Uimonen 9f4a893845 topology: change byt/cht max media pcm rate to 48kHz
Byt doesn't have enough memory to handle buffer size
increase from updating media pipeline's pcm_max_rate to
96kHz. So limit it to 48khz.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-08-22 23:55:16 +02:00
Jaska Uimonen db138eba8f topology: fix buffer size calculation
The buffer frame size calculation has obvious issues by
doing division instead of multiplication. On the other
hand we can't do decimal calculations in M4. So fix this
by introducing new macro for buffer frame size where we
multiply samplerate and schedule_period and divide by
1000000.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-08-20 09:21:14 +02:00
Seppo Ingalsuo b8fa3c7ad5 Topology: Add amplifying high-pass EQ to DMIC capture paths
This patch alters topologies those use pipelines definitions from
intel-generic-dmic.m4. The 48 kHz and 16 kHz capture pipelines are
changed to use pipe-eq-capture instead of pipe-volume-capture. The new
pipeline contains volume but also an IIR EQ set for second order
high-pass with 50 Hz cut-off frequency. The IIR includes +20 dB
gain. The volume max is decreased by 10 dB due to the amplifying
IIR add.

The gain in IIR helps with too low capture loudness with default 0 dB
setting for volume. Further gain can be achieved with volume control.

The high-pass filter fixes the issue of too slow DCCOMP settling in
DMIC platform hardware. With IIR add the DMIC unmute ramp is shortened
to 200 ms from 400 ms in the 48 kHz pipeline. In 16 kHz pipeline the
400ms unmute is preserved due to slower DCCOMP settling time.

The min. channels count of two is replaced by pipeline channels count
macro to prevent corrupt capture to happen by capturing as 2ch from
4ch source.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2019-08-19 09:47:04 +02:00
Seppo Ingalsuo 4a4923ee53 Topology: Change minimum channel count in volume capture pipeline
This patch replaces minimum channel count two by PIPELINE_CHANNELS to
avoid corrupted capture audio due to capturing other channel count
than what the DAI is configured for.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2019-08-19 09:47:04 +02:00
Jaska Uimonen 8bd25eac3f topology: add 50kHz output topology for apl
Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-08-15 14:29:22 +02:00
Jaska Uimonen 77b6db8894 topology: enable pcm range and pipeline rate and remove frame count
Enable setting pcm min and max rate from top level m4 pipeline macro.
This way it is possible to configure the whole pipeline to correct
samplerate range in 1 file. Previously you needed to modify the pipeline
macros where the rate was hardcoded. As the frame count is calculated
from pcm/dai rate and scheduling time the frame count is obsolete.

Introduce pipeline rate parameter to help configuring components with
fixed output rate. We can't deduce this from pcm range since for example
src might accept bigger max rate than the following dai. Even though the
parameter is named "pipeline rate" it essentially means the "final"
output rate to which this pipeline is connected to (dai or other
pipeline). In capture pipelines it means the originating fixed dai rate.

Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-08-15 14:29:22 +02:00
Pierre-Louis Bossart c6f1b08fd2 topology: intel-generic-dmic: rename devices
DMIC32 and DMIC16 are just confusing. It's not clear if the numbers
refer to kHz or bits. Rename to make the names self-explanatory.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-08-10 10:35:02 +02:00
Pierre-Louis Bossart 6237763d96 topology: generate HDaudio topologies without DMIC
Not all HDaudio platforms have DMIC support, generate solution without
any DMIC. This will be used in combination with NHLT information (or
kernel module parameter) by the driver to automatically select the
relevant topology.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-08-10 10:35:02 +02:00
Zhang Keqiao 2d0759dd02 topology: add demux pipeline to CML max98357a tplg
This topology will add a mux pipeline to support echo reference for CML.

Signed-off-by: Zhang Keqiao <keqiao.zhang@linux.intel.com>
2019-08-01 07:05:27 +02:00
Marcin Rajwa 2bfe9c48c4 detector: update ABI to support 24 and 32 bit samples
This patch updates header file to support 24/32 bit samples
and also adds new default config.

Signed-off-by: Marcin Rajwa <marcin.rajwa@linux.intel.com>
2019-07-30 17:24:06 +02:00
Zhang Keqiao fd6208d65b topology: sof-cml-demux-rt5682: revise physical link iDisp1 ID
to align with machine driver

The physical link iDisp1 ID for HDMI should be changed to 3,4,5
to align with machine driver. ID 2 is defined for DMIC16k.

Signed-off-by: Zhang Keqiao <keqiao.zhang@linux.intel.com>
2019-07-25 13:38:47 +02:00
Seppo Ingalsuo 4870332719 Topology: Updates for single EQ pipeline definitions
This patch provides needed maintenance. The pipelines
missed the volume ramp tokens and caused topology build fail for
topologies those would use the pipeline macros
pipe-eq-fir-volume-playback.m4 and pipe-eq-iir-volume-playback.m4.

The embedded filter coefficients in these pipelines were replaced
by included default FIR and IIR filter coefficients to fix ABI
incompatibility in the configuration blobs and ease future
maintenance of these pipelines.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
2019-07-12 09:24:51 +02:00
Keyon Jie 09b416bb5a topology: sof-cml-rt5682-max98357a: switch to use kwd pipelines
Switch to use sof-cml-rt5682-kwd.m4 which can support Keyword Detect
feature.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
2019-07-11 15:32:01 +02:00
Keyon Jie b56fcbc44a topology: sof-cml-rt5682-max98357a: change BE id to align with machine
driver

The BE id for amplifier pipeline should be changed to 6 to align with
machine driver (The commit ASoC: Intel: sof-rt5682: correct naming for
dmic16k).

Cc: Sathya Prakash M R <sathya.prakash.m.r@intel.com>
Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
2019-07-11 15:32:01 +02:00
Keyon Jie d1ae32a322 topology: sof-cml-rt5682: refining for dmic16k pipeline
Add volume component, change to use 16KHz sample rate, and modify the
PCM ID from 5 to 8, as it is in lower priority comparing with pipelines
like amplifier.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
2019-07-11 15:32:01 +02:00
Janusz Jankowski 27cdfbdb40 m4: support for ssp bclk_delay token
BCLK delay is optional last value (after quirks),
in SSP_CONFIG_DATA.

Signed-off-by: Janusz Jankowski <janusz.jankowski@linux.intel.com>
2019-07-05 11:55:51 +02:00
Keyon Jie 2762ada65e topology: cml-rt5682-kwd: change to use S24_LE format for CML
As dmic only support 16 bit or 32 bit, we configure dmic dai to be
s32_le, and pipelines to be s24_le.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
2019-07-03 14:10:00 +02:00