mirror of https://github.com/thesofproject/sof.git
intel: ssp: do not read data directly if DMA is active
If DMA is active, do not read data directly from the SSP RX fifo. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
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@ -74,9 +74,18 @@ static void ssp_empty_rx_fifo(struct dai *dai)
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uint64_t sample_ticks = clock_ticks_per_sample(PLATFORM_DEFAULT_CLOCK,
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ssp->params.fsync_rate);
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uint32_t retry = SSP_RX_FLUSH_RETRY_MAX;
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bool direct_reads = ssp->state[DAI_DIR_CAPTURE] <= COMP_STATE_PREPARE;
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uint32_t entries;
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uint32_t i;
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#if CONFIG_DMA_SUSPEND_DRAIN
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/*
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* In drain mode, DMA is stopped before DAI, so flush must be
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* always done with direct register read.
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*/
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direct_reads = true;
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#endif
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/*
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* To make sure all the RX FIFO entries are read out for the flushing,
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* we need to wait a minimal SSP port delay after entries are all read,
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@ -87,9 +96,12 @@ static void ssp_empty_rx_fifo(struct dai *dai)
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while ((ssp_read(dai, SSSR) & SSSR_RNE) && retry--) {
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entries = SSCR3_RFL_VAL(ssp_read(dai, SSCR3));
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dai_dbg(dai, "ssp_empty_rx_fifo(), before flushing, entries %d", entries);
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/* let DMA consume data or read RX FIFO directly */
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if (direct_reads) {
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for (i = 0; i < entries + 1; i++)
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/* read to try empty fifo */
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ssp_read(dai, SSDR);
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}
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/* wait to get valid fifo status and re-check */
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wait_delay(sample_ticks);
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