intel: ssp: do not read data directly if DMA is active

If DMA is active, do not read data directly from the SSP
RX fifo.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This commit is contained in:
Kai Vehmanen 2023-05-05 15:46:55 +03:00 committed by Kai Vehmanen
parent c00354b46d
commit e94071fb82
1 changed files with 15 additions and 3 deletions

View File

@ -74,9 +74,18 @@ static void ssp_empty_rx_fifo(struct dai *dai)
uint64_t sample_ticks = clock_ticks_per_sample(PLATFORM_DEFAULT_CLOCK,
ssp->params.fsync_rate);
uint32_t retry = SSP_RX_FLUSH_RETRY_MAX;
bool direct_reads = ssp->state[DAI_DIR_CAPTURE] <= COMP_STATE_PREPARE;
uint32_t entries;
uint32_t i;
#if CONFIG_DMA_SUSPEND_DRAIN
/*
* In drain mode, DMA is stopped before DAI, so flush must be
* always done with direct register read.
*/
direct_reads = true;
#endif
/*
* To make sure all the RX FIFO entries are read out for the flushing,
* we need to wait a minimal SSP port delay after entries are all read,
@ -87,9 +96,12 @@ static void ssp_empty_rx_fifo(struct dai *dai)
while ((ssp_read(dai, SSSR) & SSSR_RNE) && retry--) {
entries = SSCR3_RFL_VAL(ssp_read(dai, SSCR3));
dai_dbg(dai, "ssp_empty_rx_fifo(), before flushing, entries %d", entries);
/* let DMA consume data or read RX FIFO directly */
if (direct_reads) {
for (i = 0; i < entries + 1; i++)
/* read to try empty fifo */
ssp_read(dai, SSDR);
}
/* wait to get valid fifo status and re-check */
wait_delay(sample_ticks);