platform: extract common API from platform headers.

Common platform API separated to avoid duplicated declarations
and group public functions to be implemented by every platform.

Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
This commit is contained in:
Marcin Maka 2018-06-06 12:16:03 +02:00 committed by Liam Girdwood
parent 80f3d47215
commit e5e8709dae
6 changed files with 83 additions and 44 deletions

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@ -58,9 +58,7 @@ static inline void panic_rewind(uint32_t p, uint32_t stack_rewind_frames)
p = dump_stack(p, ext_offset, stack_rewind_frames,
count * sizeof(uint32_t));
/* TODO: send IPC oops message to host */
/* panic */
/* panic - send IPC oops message to host */
platform_panic(p);
/* flush last trace messages */

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@ -0,0 +1,60 @@
/*
* Copyright (c) 2018, Intel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the Intel Corporation nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Author: Marcin Maka <marcin.maka@linux.intel.com>
*/
#ifndef __INCLUDE_SOF_PLATFORM_H__
#define __INCLUDE_SOF_PLATFORM_H__
#include <sof/sof.h>
/*
* APIs declared here are defined for every platform.
*/
/**
* \brief Platform specific implementation of the On Boot Complete handler.
* \param[in] boot_message Boot status code.
* \return 0 if successful, error code otherwise.
*/
int platform_boot_complete(uint32_t boot_message);
/**
* \brief Platform initialization entry, called during FW initialization.
* \param[in] sof Context.
* \return 0 if successful, error code otherwise.
*/
int platform_init(struct sof *sof);
/**
* \brief Called by the panic handler.
* \param[in] p Panic cause, one of SOF_IPC_PANIC_... codes.
*/
static inline void platform_panic(uint32_t p);
#endif

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@ -33,6 +33,7 @@
#ifndef __PLATFORM_PLATFORM_H__
#define __PLATFORM_PLATFORM_H__
#include <sof/platform.h>
#include <platform/platcfg.h>
#include <platform/shim.h>
#include <platform/interrupt.h>
@ -120,11 +121,11 @@ struct sof;
#define PLATFORM_NUM_SSP 6
/* Platform defined panic code */
#define platform_panic(__x) { \
mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \
(0xdead000 | (__x)) & 0x3fffffff); \
ipc_write(IPC_DIPCIE, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000); \
ipc_write(IPC_DIPCI, 0x80000000 | ((0xdead000 | (__x)) & 0x3fffffff)); \
static inline void platform_panic(uint32_t p)
{
mailbox_sw_reg_write(SRAM_REG_FW_STATUS, p & 0x3fffffff);
ipc_write(IPC_DIPCIE, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000);
ipc_write(IPC_DIPCI, 0x80000000 | (p & 0x3fffffff));
}
/* Platform defined trace code */
@ -137,10 +138,6 @@ extern struct timer *platform_timer;
* APIs declared here are defined for every platform and IPC mechanism.
*/
int platform_boot_complete(uint32_t boot_message);
int platform_init(struct sof *sof);
int platform_ssp_set_mn(uint32_t ssp_port, uint32_t source, uint32_t rate,
uint32_t bclk_fs);

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@ -33,6 +33,7 @@
#ifndef __PLATFORM_PLATFORM_H__
#define __PLATFORM_PLATFORM_H__
#include <sof/platform.h>
#include <platform/shim.h>
#include <platform/interrupt.h>
#include <uapi/ipc.h>
@ -102,20 +103,13 @@ struct sof;
#define PLATFORM_IDLE_TIME 750000
/* Platform defined panic code */
#define platform_panic(__x) { \
shim_write(SHIM_IPCDL, (0xdead000 | (__x & 0xfff))); \
shim_write(SHIM_IPCDH, (SHIM_IPCDH_BUSY | MAILBOX_EXCEPTION_OFFSET)); \
static inline void platform_panic(uint32_t p)
{
shim_write(SHIM_IPCDL, p);
shim_write(SHIM_IPCDH, (SHIM_IPCDH_BUSY | MAILBOX_EXCEPTION_OFFSET));
}
/* Platform defined trace code */
#define platform_trace_point(__x) \
shim_write(SHIM_IPCXL, (__x & 0x3fffffff))
/*
* APIs declared here are defined for every platform and IPC mechanism.
*/
int platform_boot_complete(uint32_t boot_message);
int platform_init(struct sof *sof);
#endif

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@ -34,6 +34,7 @@
#ifndef __PLATFORM_PLATFORM_H__
#define __PLATFORM_PLATFORM_H__
#include <sof/platform.h>
#include <platform/platcfg.h>
#include <platform/shim.h>
#include <platform/interrupt.h>
@ -117,12 +118,11 @@ struct sof;
#define PLATFORM_IDLE_TIME 750000
/* Platform defined trace code */
#define platform_panic(__x) { \
mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \
(0xdead000 | (__x)) & 0x3fffffff); \
ipc_write(IPC_DIPCIDD, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000); \
ipc_write(IPC_DIPCIDR, 0x80000000 | \
((0xdead000 | (__x)) & 0x3fffffff)); \
static inline void platform_panic(uint32_t p)
{
mailbox_sw_reg_write(SRAM_REG_FW_STATUS, p & 0x3fffffff);
ipc_write(IPC_DIPCIDD, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000);
ipc_write(IPC_DIPCIDR, 0x80000000 | (p & 0x3fffffff));
}
/* Platform defined trace code */
@ -135,10 +135,6 @@ extern struct timer *platform_timer;
* APIs declared here are defined for every platform and IPC mechanism.
*/
int platform_boot_complete(uint32_t boot_message);
int platform_init(struct sof *sof);
int platform_ssp_set_mn(uint32_t ssp_port, uint32_t source, uint32_t rate,
uint32_t bclk_fs);

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@ -32,6 +32,7 @@
#ifndef __PLATFORM_PLATFORM_H__
#define __PLATFORM_PLATFORM_H__
#include <sof/platform.h>
#include <platform/shim.h>
#include <platform/interrupt.h>
#include <uapi/ipc.h>
@ -101,20 +102,13 @@ struct sof;
#define PLATFORM_IDLE_TIME 750000
/* Platform defined panic code */
#define platform_panic(__x) { \
shim_write(SHIM_IPCX, MAILBOX_EXCEPTION_OFFSET & 0x3fffffff); \
shim_write(SHIM_IPCD, (SHIM_IPCD_BUSY | 0xdead000 | __x)); \
static inline void platform_panic(uint32_t p)
{
shim_write(SHIM_IPCX, MAILBOX_EXCEPTION_OFFSET & 0x3fffffff);
shim_write(SHIM_IPCD, (SHIM_IPCD_BUSY | p));
}
/* Platform defined trace code */
#define platform_trace_point(__x) \
shim_write(SHIM_IPCX, ((__x) & 0x3fffffff))
/*
* APIs declared here are defined for every platform and IPC mechanism.
*/
int platform_boot_complete(uint32_t boot_message);
int platform_init(struct sof *sof);
#endif