mirror of https://github.com/thesofproject/sof.git
platform: extract common API from platform headers.
Common platform API separated to avoid duplicated declarations and group public functions to be implemented by every platform. Signed-off-by: Marcin Maka <marcin.maka@linux.intel.com>
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@ -58,9 +58,7 @@ static inline void panic_rewind(uint32_t p, uint32_t stack_rewind_frames)
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p = dump_stack(p, ext_offset, stack_rewind_frames,
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count * sizeof(uint32_t));
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/* TODO: send IPC oops message to host */
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/* panic */
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/* panic - send IPC oops message to host */
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platform_panic(p);
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/* flush last trace messages */
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@ -0,0 +1,60 @@
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/*
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* Copyright (c) 2018, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Intel Corporation nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: Marcin Maka <marcin.maka@linux.intel.com>
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*/
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#ifndef __INCLUDE_SOF_PLATFORM_H__
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#define __INCLUDE_SOF_PLATFORM_H__
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#include <sof/sof.h>
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/*
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* APIs declared here are defined for every platform.
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*/
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/**
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* \brief Platform specific implementation of the On Boot Complete handler.
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* \param[in] boot_message Boot status code.
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* \return 0 if successful, error code otherwise.
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*/
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int platform_boot_complete(uint32_t boot_message);
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/**
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* \brief Platform initialization entry, called during FW initialization.
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* \param[in] sof Context.
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* \return 0 if successful, error code otherwise.
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*/
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int platform_init(struct sof *sof);
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/**
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* \brief Called by the panic handler.
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* \param[in] p Panic cause, one of SOF_IPC_PANIC_... codes.
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*/
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static inline void platform_panic(uint32_t p);
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#endif
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@ -33,6 +33,7 @@
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#ifndef __PLATFORM_PLATFORM_H__
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#define __PLATFORM_PLATFORM_H__
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#include <sof/platform.h>
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#include <platform/platcfg.h>
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#include <platform/shim.h>
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#include <platform/interrupt.h>
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@ -120,11 +121,11 @@ struct sof;
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#define PLATFORM_NUM_SSP 6
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/* Platform defined panic code */
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#define platform_panic(__x) { \
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mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \
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(0xdead000 | (__x)) & 0x3fffffff); \
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ipc_write(IPC_DIPCIE, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000); \
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ipc_write(IPC_DIPCI, 0x80000000 | ((0xdead000 | (__x)) & 0x3fffffff)); \
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static inline void platform_panic(uint32_t p)
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{
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mailbox_sw_reg_write(SRAM_REG_FW_STATUS, p & 0x3fffffff);
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ipc_write(IPC_DIPCIE, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000);
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ipc_write(IPC_DIPCI, 0x80000000 | (p & 0x3fffffff));
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}
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/* Platform defined trace code */
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@ -137,10 +138,6 @@ extern struct timer *platform_timer;
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* APIs declared here are defined for every platform and IPC mechanism.
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*/
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int platform_boot_complete(uint32_t boot_message);
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int platform_init(struct sof *sof);
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int platform_ssp_set_mn(uint32_t ssp_port, uint32_t source, uint32_t rate,
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uint32_t bclk_fs);
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@ -33,6 +33,7 @@
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#ifndef __PLATFORM_PLATFORM_H__
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#define __PLATFORM_PLATFORM_H__
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#include <sof/platform.h>
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#include <platform/shim.h>
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#include <platform/interrupt.h>
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#include <uapi/ipc.h>
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@ -102,20 +103,13 @@ struct sof;
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#define PLATFORM_IDLE_TIME 750000
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/* Platform defined panic code */
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#define platform_panic(__x) { \
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shim_write(SHIM_IPCDL, (0xdead000 | (__x & 0xfff))); \
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shim_write(SHIM_IPCDH, (SHIM_IPCDH_BUSY | MAILBOX_EXCEPTION_OFFSET)); \
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static inline void platform_panic(uint32_t p)
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{
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shim_write(SHIM_IPCDL, p);
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shim_write(SHIM_IPCDH, (SHIM_IPCDH_BUSY | MAILBOX_EXCEPTION_OFFSET));
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}
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/* Platform defined trace code */
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#define platform_trace_point(__x) \
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shim_write(SHIM_IPCXL, (__x & 0x3fffffff))
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/*
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* APIs declared here are defined for every platform and IPC mechanism.
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*/
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int platform_boot_complete(uint32_t boot_message);
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int platform_init(struct sof *sof);
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#endif
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@ -34,6 +34,7 @@
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#ifndef __PLATFORM_PLATFORM_H__
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#define __PLATFORM_PLATFORM_H__
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#include <sof/platform.h>
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#include <platform/platcfg.h>
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#include <platform/shim.h>
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#include <platform/interrupt.h>
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@ -117,12 +118,11 @@ struct sof;
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#define PLATFORM_IDLE_TIME 750000
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/* Platform defined trace code */
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#define platform_panic(__x) { \
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mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \
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(0xdead000 | (__x)) & 0x3fffffff); \
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ipc_write(IPC_DIPCIDD, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000); \
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ipc_write(IPC_DIPCIDR, 0x80000000 | \
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((0xdead000 | (__x)) & 0x3fffffff)); \
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static inline void platform_panic(uint32_t p)
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{
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mailbox_sw_reg_write(SRAM_REG_FW_STATUS, p & 0x3fffffff);
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ipc_write(IPC_DIPCIDD, MAILBOX_EXCEPTION_OFFSET + 2 * 0x20000);
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ipc_write(IPC_DIPCIDR, 0x80000000 | (p & 0x3fffffff));
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}
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/* Platform defined trace code */
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@ -135,10 +135,6 @@ extern struct timer *platform_timer;
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* APIs declared here are defined for every platform and IPC mechanism.
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*/
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int platform_boot_complete(uint32_t boot_message);
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int platform_init(struct sof *sof);
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int platform_ssp_set_mn(uint32_t ssp_port, uint32_t source, uint32_t rate,
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uint32_t bclk_fs);
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@ -32,6 +32,7 @@
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#ifndef __PLATFORM_PLATFORM_H__
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#define __PLATFORM_PLATFORM_H__
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#include <sof/platform.h>
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#include <platform/shim.h>
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#include <platform/interrupt.h>
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#include <uapi/ipc.h>
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@ -101,20 +102,13 @@ struct sof;
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#define PLATFORM_IDLE_TIME 750000
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/* Platform defined panic code */
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#define platform_panic(__x) { \
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shim_write(SHIM_IPCX, MAILBOX_EXCEPTION_OFFSET & 0x3fffffff); \
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shim_write(SHIM_IPCD, (SHIM_IPCD_BUSY | 0xdead000 | __x)); \
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static inline void platform_panic(uint32_t p)
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{
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shim_write(SHIM_IPCX, MAILBOX_EXCEPTION_OFFSET & 0x3fffffff);
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shim_write(SHIM_IPCD, (SHIM_IPCD_BUSY | p));
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}
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/* Platform defined trace code */
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#define platform_trace_point(__x) \
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shim_write(SHIM_IPCX, ((__x) & 0x3fffffff))
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/*
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* APIs declared here are defined for every platform and IPC mechanism.
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*/
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int platform_boot_complete(uint32_t boot_message);
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int platform_init(struct sof *sof);
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#endif
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