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config: ace: enable clock gating 

This patch enables clock gating in configurations of a ace platforms.

With CONFIG_ADSP_IDLE_CLOCK_GATING enabled clock gating is always
enabled during WAITI.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This commit is contained in:
Tomasz Leman 2023-12-08 22:34:38 +01:00 committed by Kai Vehmanen
parent 9d42bdee8d
commit ddf70fa033
2 changed files with 2 additions and 0 deletions
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1
app/boards/intel_adsp_ace15_mtpm.conf
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@ -20,6 +20,7 @@ CONFIG_POWER_DOMAIN=y
CONFIG_POWER_DOMAIN_INTEL_ADSP=y CONFIG_POWER_DOMAIN_INTEL_ADSP=y
CONFIG_ADSP_IMR_CONTEXT_SAVE=y CONFIG_ADSP_IMR_CONTEXT_SAVE=y
CONFIG_ADSP_IDLE_CLOCK_GATING=y
# enable Zephyr drivers # enable Zephyr drivers
CONFIG_ZEPHYR_NATIVE_DRIVERS=y CONFIG_ZEPHYR_NATIVE_DRIVERS=y

1
app/boards/intel_adsp_ace20_lnl.conf
View File

@ -13,6 +13,7 @@ CONFIG_PM_DEVICE_RUNTIME_EXCLUSIVE=n
CONFIG_PM_DEVICE_POWER_DOMAIN=y CONFIG_PM_DEVICE_POWER_DOMAIN=y
CONFIG_PM_POLICY_CUSTOM=y CONFIG_PM_POLICY_CUSTOM=y
CONFIG_ADSP_IMR_CONTEXT_SAVE=y CONFIG_ADSP_IMR_CONTEXT_SAVE=y
CONFIG_ADSP_IDLE_CLOCK_GATING=y
CONFIG_POWER_DOMAIN=y CONFIG_POWER_DOMAIN=y
CONFIG_POWER_DOMAIN_INTEL_ADSP=y CONFIG_POWER_DOMAIN_INTEL_ADSP=y