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topology1: SoundWire: make deep-buffer optional 

We don't want to release these topologies to world+dog due to
dependencies on kernel version, so let's make the deep-buffer
optional. The next patch will enable these topologies in the
development/ directory.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This commit is contained in:
Pierre-Louis Bossart 2022-04-04 17:22:55 -05:00 committed by Liam Girdwood
parent f1cf43126e
commit d636482970
4 changed files with 49 additions and 0 deletions
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12
tools/topology/topology1/sof-cml-rt700.m4
View File

@ -124,12 +124,16 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
# Deep buffer playback pipeline 31 on PCM 31 using max 2 channels of s32le
# Set 1000us deadline on core 0 with priority 0.
# TODO: Modify pipeline deadline to account for deep buffering
ifdef(`HEADSET_DEEP_BUFFER',
`
PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
31, 31, 2, s32le,
1000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_TIMER,
PIPELINE_PLAYBACK_SCHED_COMP_1)
'
)
SectionGraph."mixer-host" {
index "0"
@ -137,7 +141,11 @@ SectionGraph."mixer-host" {
lines [
# connect mixer dai pipelines to PCM pipelines
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_30)
ifdef(`HEADSET_DEEP_BUFFER',
`
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_31)
'
)
]
}
@ -165,7 +173,11 @@ DAI_ADD(sof/pipe-dai-playback.m4,
# PCM Low Latency, id 0
dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
PCM_PLAYBACK_ADD(Jack Out, 0, PIPELINE_PCM_30)
ifdef(`HEADSET_DEEP_BUFFER',
`
PCM_PLAYBACK_ADD(Jack Out DeepBuffer, 31, PIPELINE_PCM_31)
'
)
PCM_CAPTURE_ADD(Jack In, 1, PIPELINE_PCM_2)
PCM_PLAYBACK_ADD(HDMI 1, 5, PIPELINE_PCM_6)
PCM_PLAYBACK_ADD(HDMI 2, 6, PIPELINE_PCM_7)

12
tools/topology/topology1/sof-icl-rt700.m4
View File

@ -124,12 +124,16 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
# Deep buffer playback pipeline 31 on PCM 31 using max 2 channels of s32le
# Set 1000us deadline on core 0 with priority 0.
# TODO: Modify pipeline deadline to account for deep buffering
ifdef(`HEADSET_DEEP_BUFFER',
`
PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
31, 31, 2, s32le,
1000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_TIMER,
PIPELINE_PLAYBACK_SCHED_COMP_1)
'
)
SectionGraph."mixer-host" {
index "0"
@ -137,7 +141,11 @@ SectionGraph."mixer-host" {
lines [
# connect mixer dai pipelines to PCM pipelines
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_30)
ifdef(`HEADSET_DEEP_BUFFER',
`
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_31)
'
)
]
}
@ -165,7 +173,11 @@ DAI_ADD(sof/pipe-dai-playback.m4,
# PCM Low Latency, id 0
dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
PCM_PLAYBACK_ADD(Jack Out, 0, PIPELINE_PCM_30)
ifdef(`HEADSET_DEEP_BUFFER',
`
PCM_PLAYBACK_ADD(Jack Out DeepBuffer, 31, PIPELINE_PCM_31)
'
)
PCM_CAPTURE_ADD(Jack In, 1, PIPELINE_PCM_2)
PCM_PLAYBACK_ADD(HDMI 1, 5, PIPELINE_PCM_6)
PCM_PLAYBACK_ADD(HDMI 2, 6, PIPELINE_PCM_7)

12
tools/topology/topology1/sof-icl-rt711-rt1308-rt715-hdmi.m4
View File

@ -231,12 +231,16 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
# Deep buffer playback pipeline 31 on PCM 31 using max 2 channels of s32le
# Set 1000us deadline on core 0 with priority 0.
# TODO: Modify pipeline deadline to account for deep buffering
ifdef(`HEADSET_DEEP_BUFFER',
`
PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
31, 31, 2, s32le,
1000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_TIMER,
PIPELINE_PLAYBACK_SCHED_COMP_1)
'
)
SectionGraph."mixer-host" {
index "0"
@ -244,7 +248,11 @@ SectionGraph."mixer-host" {
lines [
# connect mixer dai pipelines to PCM pipelines
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_30)
ifdef(`HEADSET_DEEP_BUFFER',
`
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_31)
'
)
]
}
@ -316,7 +324,11 @@ dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
ifdef(`NOJACK', `',
`
PCM_PLAYBACK_ADD(Jack Out, 0, PIPELINE_PCM_30)
ifdef(`HEADSET_DEEP_BUFFER',
`
PCM_PLAYBACK_ADD(Jack Out DeepBuffer, 31, PIPELINE_PCM_31)
'
)
PCM_CAPTURE_ADD(Jack In, 1, PIPELINE_PCM_2)
')
ifdef(`NOAMP', `',

13
tools/topology/topology1/sof-tgl-rt711-rt1308.m4
View File

@ -191,12 +191,16 @@ PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
# Deep buffer playback pipeline 31 on PCM 31 using max 2 channels of s32le
# Set 1000us deadline on core 0 with priority 0.
# TODO: Modify pipeline deadline to account for deep buffering
ifdef(`HEADSET_DEEP_BUFFER',
`
PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
31, 31, 2, s32le,
1000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_TIMER,
PIPELINE_PLAYBACK_SCHED_COMP_1)
'
)
SectionGraph."mixer-host" {
index "0"
@ -204,7 +208,12 @@ SectionGraph."mixer-host" {
lines [
# connect mixer dai pipelines to PCM pipelines
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_30)
ifdef(`HEADSET_DEEP_BUFFER',
`
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_31)
'
)
]
}
@ -249,7 +258,11 @@ DAI_ADD(sof/pipe-dai-playback.m4,
# PCM Low Latency, id 0
dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
PCM_PLAYBACK_ADD(Jack Out, 0, PIPELINE_PCM_30)
ifdef(`HEADSET_DEEP_BUFFER',
`
PCM_PLAYBACK_ADD(Jack Out DeepBuffer, 31, PIPELINE_PCM_31)
'
)
PCM_CAPTURE_ADD(Jack In, 1, PIPELINE_PCM_2)
ifdef(`EXT_AMP',
`