mirror of https://github.com/thesofproject/sof.git
cavs: deduplicate power down sequence for cavs platforms
cAVS power down sequence refactored by moving CannonLake (cAVS 1.8) implementation to cavs lib as a base for cAVS 1.8/2.0/2.5 common code. ApolloLake (cAVS 1.5) specific implementation remains as a platform specific code. Signed-off-by: Lech Betlej <lech.betlej@linux.intel.com>
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6d3d5bcdad
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c548489e38
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@ -2,8 +2,6 @@
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add_subdirectory(lib)
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add_local_sources(sof power_down.S)
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add_executable(boot_module boot_module.c)
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add_executable(base_module base_module.c)
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@ -0,0 +1,20 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2019 Intel Corporation. All rights reserved.
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*
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* Author: Lech Betlej <lech.betlej@linux.intel.com>
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*/
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/**
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* \file platform/apollolake/lib/asm_ldo_management.h
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* \brief Macros for controlling LDO state specific for cAVS 1.5. The header is
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* intended to be used in Apollolake specific implementation of power_down
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* routine
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*/
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#ifndef __PLATFORM_LIB_ASM_LDO_MANAGEMENT_H__
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#define __PLATFORM_LIB_ASM_LDO_MANAGEMENT_H__
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#include <cavs/lib/asm_ldo_management.h>
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#endif /* __PLATFORM_LIB_ASM_LDO_MANAGEMENT_H__ */
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@ -6,13 +6,13 @@
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*/
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/**
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* \file platform/apollolake/include/platform/asm_memory_management.h
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* \file platform/apollolake/include/platform/lib/asm_memory_management.h
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* \brief Macros for power gating memory banks specific for Apollolake
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* \author Lech Betlej <lech.betlej@linux.intel.com>
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*/
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#ifndef __PLATFORM_ASM_MEMORY_MANAGEMENT_H__
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#define __PLATFORM_ASM_MEMORY_MANAGEMENT_H__
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#ifndef __PLATFORM_LIB_ASM_MEMORY_MANAGEMENT_H__
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#define __PLATFORM_LIB_ASM_MEMORY_MANAGEMENT_H__
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#ifndef ASSEMBLY
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#warning "ASSEMBLY macro not defined."
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@ -67,4 +67,4 @@
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bne \ax, \ay, 1b
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.endm
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#endif /* __PLATFORM_ASM_MEMORY_MANAGEMENT_H__ */
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#endif /* __PLATFORM_LIB_ASM_MEMORY_MANAGEMENT_H__ */
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@ -1,3 +1,5 @@
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# SPDX-License-Identifier: BSD-3-Clause
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add_local_sources(sof clk.c)
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add_local_sources(sof
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clk.c
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power_down.S)
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@ -6,13 +6,12 @@
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*/
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/**
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* \file platform/apollolake/power_down.S
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* \file platform/apollolake/lib/power_down.S
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* \brief Power gating memory banks - implementation specific for Apollolake
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* \author Lech Betlej <lech.betlej@linux.intel.com>
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*/
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#include <platform/asm_ldo_management.h>
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#include <platform/asm_memory_management.h>
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#include <platform/lib/asm_ldo_management.h>
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#include <platform/lib/asm_memory_management.h>
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#include <sof/lib/memory.h>
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#include <sof/lib/shim.h>
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@ -2,8 +2,6 @@
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add_subdirectory(lib)
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add_local_sources(sof power_down.S)
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add_executable(boot_module boot_module.c)
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add_executable(base_module base_module.c)
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@ -1,109 +0,0 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2018 Intel Corporation. All rights reserved.
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*
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* Author: Lech Betlej <lech.betlej@linux.intel.com>
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*/
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/**
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* \file platform/apollolake/include/platform/asm_ldo_management.h
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* \brief Macros for controlling LDO state specific for cAVS 1.5
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* \author Lech Betlej <lech.betlej@linux.intel.com>
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*/
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#ifndef __PLATFORM_ASM_LDO_MANAGEMENT_H__
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#define __PLATFORM_ASM_LDO_MANAGEMENT_H__
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#ifndef ASSEMBLY
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#warning "Header can only be used by assembly sources."
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#endif
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#include <sof/lib/shim.h>
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.macro m_cavs_set_ldo_state state, ax
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movi \ax, (SHIM_BASE + SHIM_LDOCTL)
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s32i \state, \ax, 0
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memw
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// wait loop > 300ns (min 100ns required)
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movi \ax, 128
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1 :
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addi \ax, \ax, -1
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nop
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bnez \ax, 1b
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.endm
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.macro m_cavs_set_hpldo_state state, ax, ay
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movi \ax, (SHIM_BASE + SHIM_LDOCTL)
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l32i \ay, \ax, 0
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movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK)
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and \ay, \ax, \ay
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or \state, \ay, \state
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m_cavs_set_ldo_state \state, \ax
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.endm
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.macro m_cavs_set_lpldo_state state, ax, ay
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movi \ax, (SHIM_BASE + SHIM_LDOCTL)
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l32i \ay, \ax, 0
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// LP SRAM mask
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movi \ax, ~(SHIM_LDOCTL_LPSRAM_MASK)
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and \ay, \ax, \ay
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or \state, \ay, \state
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m_cavs_set_ldo_state \state, \ax
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.endm
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.macro m_cavs_set_ldo_on_state ax, ay, az
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movi \ay, (SHIM_BASE + SHIM_LDOCTL)
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l32i \az, \ay, 0
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movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
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and \az, \ax, \az
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movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_ON | SHIM_LDOCTL_LPSRAM_LDO_ON)
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or \ax, \az, \ax
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m_cavs_set_ldo_state \ax, \ay
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.endm
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.macro m_cavs_set_ldo_off_state ax, ay, az
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// wait loop > 300ns (min 100ns required)
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movi \ax, 128
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1 :
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addi \ax, \ax, -1
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nop
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bnez \ax, 1b
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movi \ay, (SHIM_BASE + SHIM_LDOCTL)
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l32i \az, \ay, 0
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movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
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and \az, \az, \ax
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movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_OFF | SHIM_LDOCTL_LPSRAM_LDO_OFF)
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or \ax, \ax, \az
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s32i \ax, \ay, 0
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l32i \ax, \ay, 0
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.endm
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.macro m_cavs_set_ldo_bypass_state ax, ay, az
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// wait loop > 300ns (min 100ns required)
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movi \ax, 128
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1 :
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addi \ax, \ax, -1
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nop
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bnez \ax, 1b
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movi \ay, (SHIM_BASE + SHIM_LDOCTL)
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l32i \az, \ay, 0
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movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
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and \az, \az, \ax
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movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_BYPASS | SHIM_LDOCTL_LPSRAM_LDO_BYPASS)
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or \ax, \ax, \az
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s32i \ax, \ay, 0
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l32i \ax, \ay, 0
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.endm
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#endif /* __PLATFORM_ASM_LDO_MANAGEMENT_H__ */
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@ -146,6 +146,9 @@
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#define HSRMCTL0 0x71D14
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#define HSPGISTS0 0x71D18
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#define SHIM_HSPGCTL(x) (HSPGCTL0 + 0x10 * (x))
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#define SHIM_HSPGISTS(x) (HSPGISTS0 + 0x10 * (x))
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#define HSPGCTL1 0x71D20
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#define HSRMCTL1 0x71D24
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#define HSPGISTS1 0x71D28
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@ -7,12 +7,12 @@
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/**
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* \file platform/apollolake/include/platform/asm_ldo_management.h
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* \brief Macros for controlling LDO state specific for cAVS 1.5
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* \brief Macros for controlling LDO state specific for cAVS
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* \author Lech Betlej <lech.betlej@linux.intel.com>
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*/
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#ifndef __PLATFORM_ASM_LDO_MANAGEMENT_H__
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#define __PLATFORM_ASM_LDO_MANAGEMENT_H__
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#ifndef __CAVS_LIB_ASM_LDO_MANAGEMENT_H__
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#define __CAVS_LIB_ASM_LDO_MANAGEMENT_H__
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#ifndef ASSEMBLY
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#warning "Header can only be used by assembly sources."
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l32i \ax, \ay, 0
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.endm
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#endif /* __PLATFORM_ASM_LDO_MANAGEMENT_H__ */
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#endif /* __CAVS_LIB_ASM_LDO_MANAGEMENT_H__ */
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/**
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* \file platform/cannonlake/include/platform/asm_memory_management.h
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* \brief Macros for power gating memory banks specific for cAVS 1.8
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* \(CannonLake)
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* \(CannonLake) and cAVS 2.0 (IceLake)
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* \author Lech Betlej <lech.betlej@linux.intel.com>
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*/
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#ifndef __PLATFORM_ASM_MEMORY_MANAGEMENT_H__
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#define __PLATFORM_ASM_MEMORY_MANAGEMENT_H__
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#ifndef __CAVS_LIB_ASM_MEMORY_MANAGEMENT_H__
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#define __CAVS_LIB_ASM_MEMORY_MANAGEMENT_H__
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#ifndef ASSEMBLY
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#warning "ASSEMBLY macro not defined. Header can't be inluded in C files"
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#warning "The file is intended to be includded in assembly files only."
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#warning "ASSEMBLY macro not defined. Header can't be included in C files"
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#warning "The file is intended to be included in assembly files only."
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#endif
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#include <sof/lib/memory.h>
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#include <sof/lib/shim.h>
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#if CAVS_VERSION >= CAVS_VERSION_1_8
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/**
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* powers down entire hpsram. on entry lirerals and code for section from
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* where this code is executed needs to be placed in memory which is not
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* Macro powers down entire HPSRAM. On entry literals and code for section from
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* where this code is executed need to be placed in memory which is not
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* HPSRAM (in case when this code is located in HPSRAM, lock memory in L1$ or
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* L1 SRAM)
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*/
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bnez \ax, 1b
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.endm
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#endif /* __PLATFORM_ASM_MEMORY_MANAGEMENT_H__ */
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#endif /* CAVS_VERSION == CAVS_VERSION_1_8 */
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#endif /* __CAVS_LIB_ASM_MEMORY_MANAGEMENT_H__ */
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@ -6,4 +6,5 @@ add_local_sources(sof
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memory.c
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pm_runtime.c
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pm_memory.c
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power_down.S
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)
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*/
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/**
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* \file platform/cannonlake/power_down.S
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* \brief Power gating memory banks - implementation specific for platfroms
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* \file platform/intel/cavs/lib/power_down.S
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* \brief Power gating memory banks - implementation specific for platforms
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* with cAVS 1.8 (i.e. CannonLake) and cAVS 2.0 (i.e. IceLake)
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* \author Lech Betlej <lech.betlej@linux.intel.com>
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*/
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#include <platform/asm_ldo_management.h>
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#include <platform/asm_memory_management.h>
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#include <cavs/version.h>
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#include <cavs/lib/asm_ldo_management.h>
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#include <cavs/lib/asm_memory_management.h>
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#include <sof/lib/memory.h>
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#include <sof/lib/shim.h>
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#if CAVS_VERSION >= CAVS_VERSION_1_8
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.section .text, "ax"
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.align 64
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literals:
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#define temp_reg3 a9
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#define pfl_reg a15
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power_down:
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entry sp, 32
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// effectively executes:
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_PD_DISABLE_HPSRAM:
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/* if value in memory pointed by pu32_hpsram_mask = 0
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(hpsram_pwrgating_mask) - do not disable hpsram. */
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beqz pu32_hpsram_mask, _PD_SEND_IPC
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beqz pu32_hpsram_mask, _PD_SEND_IPC
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/* mandatory sequence for LDO ON - effectively executes:
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* m_cavs_s_set_ldo_hpsram_on_state();
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.size power_down , . - power_down
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#endif /* CAVS_VERSION >= CAVS_VERSION_1_8 */
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@ -150,6 +150,9 @@
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#define HSRMCTL1 0x71D24
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#define HSPGISTS1 0x71D28
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#define SHIM_HSPGCTL(x) (HSPGCTL0 + 0x10 * (x))
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#define SHIM_HSPGISTS(x) (HSPGISTS0 + 0x10 * (x))
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#define LSPGCTL 0x71D50
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#define LSRMCTL 0x71D54
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#define LSPGISTS 0x71D58
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#define HSRMCTL1 0x71D24
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#define HSPGISTS1 0x71D28
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#define SHIM_HSPGCTL(x) (HSPGCTL0 + 0x10 * (x))
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#define SHIM_HSPGISTS(x) (HSPGISTS0 + 0x10 * (x))
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#define LSPGCTL 0x71D50
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#define LSRMCTL 0x71D54
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#define LSPGISTS 0x71D58
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