cavs: disable data cache operations on uncached addresses

Trying to write back cache on uncached addresses can overwrite data.
Invalidating cache should have no ill effects but isn't very
meaningful either. Disable both.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>

src/arch/xtensa/include/arch/lib/cache.h

@@ -20,10 +20,15 @@
 #include <stddef.h>
 #include <stdint.h>
 
+#define SRAM_UNCACHED_ALIAS	0x20000000
+
+#define is_cached(address) (!!((uintptr_t)(address) & SRAM_UNCACHED_ALIAS))
+
 static inline void dcache_writeback_region(void *addr, size_t size)
 {
 #if XCHAL_DCACHE_SIZE > 0
-	xthal_dcache_region_writeback(addr, size);
+	if (is_cached(addr))
+		xthal_dcache_region_writeback(addr, size);
 #endif
 }
 
@@ -37,7 +42,8 @@ static inline void dcache_writeback_all(void)
 static inline void dcache_invalidate_region(void *addr, size_t size)
 {
 #if XCHAL_DCACHE_SIZE > 0
-	xthal_dcache_region_invalidate(addr, size);
+	if (is_cached(addr))
+		xthal_dcache_region_invalidate(addr, size);
 #endif
 }
 
@@ -65,7 +71,8 @@ static inline void icache_invalidate_all(void)
 static inline void dcache_writeback_invalidate_region(void *addr, size_t size)
 {
 #if XCHAL_DCACHE_SIZE > 0
-	xthal_dcache_region_writeback_inv(addr, size);
+	if (is_cached(addr))
+		xthal_dcache_region_writeback_inv(addr, size);
 #endif
 }
 

src/platform/intel/cavs/include/cavs/lib/memory.h

@@ -85,7 +85,7 @@ struct sof;
 
 #define SRAM_ALIAS_BASE		0x9E000000
 #define SRAM_ALIAS_MASK		0xFF000000
-#define SRAM_ALIAS_OFFSET	0x20000000
+#define SRAM_ALIAS_OFFSET	SRAM_UNCACHED_ALIAS
 
 #if !defined UNIT_TEST && !defined __ZEPHYR__
 #define uncache_to_cache(address) \