mirror of https://github.com/thesofproject/sof.git
imx8m: add support for SDMA2 and SAI1
Add SDMA2 and SAI1 related info. Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
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@ -10,7 +10,7 @@
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#ifndef __PLATFORM_LIB_DMA_H__
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#define __PLATFORM_LIB_DMA_H__
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#define PLATFORM_NUM_DMACS 2
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#define PLATFORM_NUM_DMACS 3
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/* max number of supported DMA channels */
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#define PLATFORM_MAX_DMA_CHAN 32
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@ -41,6 +41,9 @@
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#define SDMA3_BASE 0x30e00000
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#define SDMA3_SIZE 0x10000
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#define SAI_1_BASE 0x30c10000
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#define SAI_1_SIZE 0x00010000
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#define SAI_3_BASE 0x30c30000
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#define SAI_3_SIZE 0x00010000
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@ -14,6 +14,24 @@
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#include <ipc/stream.h>
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static SHARED_DATA struct dai sai[] = {
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{
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.index = 1,
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.plat_data = {
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.base = SAI_1_BASE,
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.fifo[SOF_IPC_STREAM_PLAYBACK] = {
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.offset = SAI_1_BASE + REG_SAI_TDR0,
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.depth = 128, /* in 4 bytes words */
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/* Handshake is SDMA hardware event */
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.handshake = 1,
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},
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.fifo[SOF_IPC_STREAM_CAPTURE] = {
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.offset = SAI_1_BASE + REG_SAI_RDR0,
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.depth = 128, /* in 4 bytes words */
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.handshake = 0,
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},
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},
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.drv = &sai_driver,
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},
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{
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.index = 3,
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.plat_data = {
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@ -24,6 +24,21 @@ SHARED_DATA struct dma dma[PLATFORM_NUM_DMACS] = {
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},
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.ops = &dummy_dma_ops,
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},
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{
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.plat_data = {
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.id = DMA_ID_SDMA2,
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/* Note: support is available for MEM_TO_MEM but not
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* enabled as it is unneeded
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*/
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.dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM,
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.devs = DMA_DEV_SAI,
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.base = SDMA2_BASE,
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.channels = 32,
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.irq = SDMA2_IRQ,
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.irq_name = SDMA2_IRQ_NAME,
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},
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.ops = &sdma_ops,
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},
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{
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.plat_data = {
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.id = DMA_ID_SDMA3,
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@ -173,7 +173,8 @@ int platform_init(struct sof *sof)
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/* Init SDMA platform domain */
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sof->platform_dma_domain =
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dma_multi_chan_domain_init(&sof->dma_info->dma_array[1],
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1, PLATFORM_DEFAULT_CLOCK, true);
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PLATFORM_NUM_DMACS - 1,
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PLATFORM_DEFAULT_CLOCK, true);
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/* i.MX platform DMA domain will be full synchronous, no time dependent */
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sof->platform_dma_domain->full_sync = true;
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