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cnl: Access to HPSRAM power gating status register - macro updated 

Macro modified for SRAM segments > 0 fixed by register offset
update to a proper value.

Signed-off-by: Lech Betlej <lech.betlej@linux.intel.com>
This commit is contained in:
Lech Betlej 2019-10-14 15:13:17 +02:00 committed by Tomasz Lauda
parent 947238ded8
commit b5982a46aa
1 changed files with 1 additions and 1 deletions
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2
src/platform/cannonlake/include/platform/lib/shim.h
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@ -175,7 +175,7 @@
#define HSPGISTS1 0x71D28 #define HSPGISTS1 0x71D28
#define SHIM_HSPGCTL(x) (HSPGCTL0 + 0x10 * (x)) #define SHIM_HSPGCTL(x) (HSPGCTL0 + 0x10 * (x))
#define SHIM_HSPGISTS(x) (HSPGISTS0 + 0x18 * (x)) #define SHIM_HSPGISTS(x) (HSPGISTS0 + 0x10 * (x))
#define LSPGCTL 0x71D50 #define LSPGCTL 0x71D50
#define LSRMCTL 0x71D54 #define LSRMCTL 0x71D54