From b532c31f9456e7f276592266b0f12d871a31fcbd Mon Sep 17 00:00:00 2001 From: Laurentiu Mihalcea Date: Wed, 19 Apr 2023 17:14:26 +0300 Subject: [PATCH] drivers: imx: ipc: Add macro for interrupt_clear() on ARM64 In the case of ARM64 with GIC, the interrupts are cleared after the ISR is executed (for reference please see arm_gic_eoi() and arch/arm64/core/isr_wrapper.S from Zephyr). Thanks to this, we don't need to clear them explicitly, hence there's no need for interrupt_clear() to be defined. This commit fixes linkage problems caused by the fact that interrupt_clear() is not defined on ARM64. Signed-off-by: Laurentiu Mihalcea --- src/drivers/imx/ipc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/drivers/imx/ipc.c b/src/drivers/imx/ipc.c index 12c1b02ee..a9cd681ba 100644 --- a/src/drivers/imx/ipc.c +++ b/src/drivers/imx/ipc.c @@ -33,6 +33,16 @@ LOG_MODULE_REGISTER(ipc_task, CONFIG_SOF_LOG_LEVEL); +#ifdef CONFIG_ARM64 +/* thanks to the fact that ARM's GIC is supported + * by Zephyr there's no need to clear interrupts + * explicitly. This should already be done by Zephyr + * after executing the ISR. This macro is used for + * linkage purposes on ARM64-based platforms. + */ +#define interrupt_clear(irq) +#endif /* CONFIG_ARM64 */ + /* 389c9186-5a7d-4ad1-a02c-a02ecdadfb33 */ DECLARE_SOF_UUID("ipc-task", ipc_task_uuid, 0x389c9186, 0x5a7d, 0x4ad1, 0xa0, 0x2c, 0xa0, 0x2e, 0xcd, 0xad, 0xfb, 0x33);