mirror of https://github.com/thesofproject/sof.git
topology: remove cht-src-50kHz-pcm512x
No one uses this topology so let's remove it. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
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@ -21,7 +21,6 @@ set(TPLGS
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"sof-cht-nocodec\;sof-byt-nocodec\;-DPLATFORM=byt-nocodec\;-DSSP_NUM=2"
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"sof-bdw-nocodec\;sof-bdw-nocodec"
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"sof-cht-max98090\;sof-cht-max98090"
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"sof-cht-src-50khz-pcm512x\;sof-cht-src-50khz-pcm512x"
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"sof-hda-generic\;sof-hda-generic\;-DCHANNELS=0\;-DPPROC=volume"
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"sof-hda-generic\;sof-hda-generic-2ch\;-DCHANNELS=2\;-DPPROC=volume\;-DDMICPROC_FILTER1=eq_iir_coef_highpass_40hz_20db_48khz.m4\;-DDMIC16KPROC_FILTER1=eq_iir_coef_highpass_40hz_20db_16khz.m4"
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"sof-hda-generic\;sof-hda-generic-4ch\;-DCHANNELS=4\;-DPPROC=volume\;-DDMICPROC_FILTER1=eq_iir_coef_highpass_40hz_20db_48khz.m4\;-DDMIC16KPROC_FILTER1=eq_iir_coef_highpass_40hz_20db_16khz.m4"
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@ -1,74 +0,0 @@
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#
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# Topology for Cherrytrail UP with pcm512x codec with sample rate
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# conversion (SRC component).
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#
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`pipeline.m4')
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include(`ssp.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include Cherrytrail DSP configuration
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include(`platform/intel/cht.m4')
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DEBUG_START
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#
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# Define the pipelines
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#
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# PCM0 ----> src -----> SSP2 (pcm512x)
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#
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl period, priority, core,
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dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
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dnl time_domain, sched_comp)
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# Playback pipeline 1 on PCM 0 using max 2 channels of s24le.
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# Schedule 1000us deadline on core 0 with priority 0
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PIPELINE_PCM_ADD(sof/pipe-src-playback.m4,
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1, 0, 2, s24le,
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1000, 0, 0,
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48000, 50000, 50000)
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#
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl deadline, priority, core)
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# playback DAI is SSP2 using 2 periods
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# Buffers use s24le format, 1000us deadline on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-playback.m4,
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1, SSP, 2, SSP2-Codec,
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PIPELINE_SOURCE_1, 2, s24le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
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# PCM, id 0
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dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
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PCM_PLAYBACK_ADD(Port2, 0, PIPELINE_PCM_1)
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#
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# BE configurations - overrides config in ACPI if present
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#
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#SSP 2 (ID: 0)
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DAI_CONFIG(SSP, 2, 0, SSP2-Codec,
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SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
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SSP_CLOCK(bclk, 3200000, codec_slave),
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SSP_CLOCK(fsync, 50000, codec_slave),
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SSP_TDM(2, 32, 3, 3),
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SSP_CONFIG_DATA(SSP, 2, 24)))
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DEBUG_END
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