dma: dw-dma: use 32 bit words for non peripheral copies.

DW-DMA is more optimal using 32bit data size when transferring between
memories. Set configuration to always use 32 bit mode for non peripheral
copies from memory to memory.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
This commit is contained in:
Liam Girdwood 2018-02-09 12:29:08 +00:00
parent 1532dfdad4
commit b0f8e5d5c2
1 changed files with 28 additions and 6 deletions

View File

@ -586,8 +586,19 @@ static int dw_dma_set_config(struct dma *dma, int channel,
/* write CTL_LOn for each lli */ /* write CTL_LOn for each lli */
switch (config->src_width) { switch (config->src_width) {
case 2: case 2:
/* config the src tr width for 16 bit samples */ /* non peripheral copies are optimal using words */
lli_desc->ctrl_lo |= DW_CTLL_SRC_WIDTH(1); switch (config->direction) {
case DMA_DIR_LMEM_TO_HMEM:
case DMA_DIR_HMEM_TO_LMEM:
case DMA_DIR_MEM_TO_MEM:
/* config the src tr width for 32 bit words */
lli_desc->ctrl_lo |= DW_CTLL_SRC_WIDTH(2);
break;
default:
/* config the src width for 16 bit samples */
lli_desc->ctrl_lo |= DW_CTLL_SRC_WIDTH(1);
break;
}
break; break;
case 4: case 4:
/* config the src tr width for 24, 32 bit samples */ /* config the src tr width for 24, 32 bit samples */
@ -601,8 +612,19 @@ static int dw_dma_set_config(struct dma *dma, int channel,
switch (config->dest_width) { switch (config->dest_width) {
case 2: case 2:
/* config the dest tr width for 16 bit samples */ /* non peripheral copies are optimal using words */
lli_desc->ctrl_lo |= DW_CTLL_DST_WIDTH(1); switch (config->direction) {
case DMA_DIR_LMEM_TO_HMEM:
case DMA_DIR_HMEM_TO_LMEM:
case DMA_DIR_MEM_TO_MEM:
/* config the dest tr width for 32 bit words */
lli_desc->ctrl_lo |= DW_CTLL_DST_WIDTH(2);
break;
default:
/* config the dest width for 16 bit samples */
lli_desc->ctrl_lo |= DW_CTLL_DST_WIDTH(1);
break;
}
break; break;
case 4: case 4:
/* config the dest tr width for 24, 32 bit samples */ /* config the dest tr width for 24, 32 bit samples */
@ -680,8 +702,8 @@ static int dw_dma_set_config(struct dma *dma, int channel,
/* set transfer size of element */ /* set transfer size of element */
#if defined CONFIG_BAYTRAIL || defined CONFIG_CHERRYTRAIL \ #if defined CONFIG_BAYTRAIL || defined CONFIG_CHERRYTRAIL \
|| defined CONFIG_APOLLOLAKE || defined CONFIG_CANNONLAKE || defined CONFIG_APOLLOLAKE || defined CONFIG_CANNONLAKE
lli_desc->ctrl_hi = DW_CTLH_CLASS(p->class) | lli_desc->ctrl_hi = DW_CTLH_CLASS(p->class) |
(sg_elem->size & DW_CTLH_BLOCK_TS_MASK); (sg_elem->size & DW_CTLH_BLOCK_TS_MASK);
#elif defined CONFIG_BROADWELL || defined CONFIG_HASWELL #elif defined CONFIG_BROADWELL || defined CONFIG_HASWELL
/* for bdw, the unit is transaction--TR_WIDTH. */ /* for bdw, the unit is transaction--TR_WIDTH. */
lli_desc->ctrl_hi = (sg_elem->size / (1 << (lli_desc->ctrl_lo >> 4 & 0x7))) lli_desc->ctrl_hi = (sg_elem->size / (1 << (lli_desc->ctrl_lo >> 4 & 0x7)))