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platform: amd: renoir: Add debug support for renoir 

Add panic code to dump required info during
firmware exceptions.

This patch enables to dump the call stack, debug info
and inform host driver for exceptions in firmware.

Signed-off-by: balapati <balakishore.pati@amd.com>
This commit is contained in:
balapati 2021-09-15 13:03:34 +05:30 committed by Liam Girdwood
parent 509eef9c96
commit ae0113287a
2 changed files with 24 additions and 1 deletions
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8
src/platform/amd/renoir/include/platform/lib/mailbox.h
View File

@ -38,6 +38,14 @@
#define MAILBOX_STREAM_BASE SRAM_STREAM_BASE
#define MAILBOX_STREAM_OFFSET SRAM_STREAM_OFFSET
static inline void mailbox_sw_reg_write(size_t offset, uint32_t src)
{
volatile uint32_t *ptr;
ptr = (volatile uint32_t *)(MAILBOX_DEBUG_BASE + offset);
*ptr = src;
}
#endif /* __PLATFORM_LIB_MAILBOX_H__ */
#else

17
src/platform/amd/renoir/include/platform/platform.h
View File

@ -20,6 +20,7 @@
#include <stddef.h>
#include <stdint.h>
#include <platform/fw_scratch_mem.h>
#include <platform/chip_registers.h>
struct ll_schedule_domain;
struct timer;
@ -62,10 +63,24 @@ struct timer;
/* default dma trace channel */
#define DMA_TRACE_CHANNEL 7
/* debug offset */
#define ACP_SOF_FW_STATUS 0
/* Platform defined panic code */
static inline void platform_panic(uint32_t p)
{
/* TODO */
acp_sw_intr_trig_t sw_intr_trig;
volatile acp_scratch_mem_config_t *pscratch_mem_cfg =
(volatile acp_scratch_mem_config_t *)(PU_REGISTER_BASE + SCRATCH_REG_OFFSET);
pscratch_mem_cfg->acp_dsp_msg_write = p;
mailbox_sw_reg_write(ACP_SOF_FW_STATUS, p);
/* Read the Software Interrupt controller register and update */
sw_intr_trig = (acp_sw_intr_trig_t) io_reg_read(PU_REGISTER_BASE + ACP_SW_INTR_TRIG);
/* Configures the trigger bit in ACP_DSP_SW_INTR_TRIG register */
sw_intr_trig.bits.trig_dsp0_to_host_intr = INTERRUPT_ENABLE;
/* Write the Software Interrupt trigger register */
io_reg_write((PU_REGISTER_BASE + ACP_SW_INTR_TRIG), sw_intr_trig.u32all);
}
/*