diff --git a/src/platform/apollolake/include/platform/memory.h b/src/platform/apollolake/include/platform/memory.h
index 9b2cf8158..ec7fc41c2 100644
--- a/src/platform/apollolake/include/platform/memory.h
+++ b/src/platform/apollolake/include/platform/memory.h
@@ -378,6 +378,9 @@
 
 #define SOF_MEM_RO_SIZE		0x8
 
+/* VM ROM sizes */
+#define ROM_RESET_TEXT_SIZE	0x400
+#define ROM_RESET_LIT_SIZE	0x200
 /* boot loader in IMR */
 #define IMR_BOOT_LDR_TEXT_ENTRY_BASE	0xB000A000
 #define IMR_BOOT_LDR_TEXT_ENTRY_SIZE	0x86
diff --git a/src/platform/apollolake/rom.x.in b/src/platform/apollolake/rom.x.in
index 8140a564a..7d36c85b3 100644
--- a/src/platform/apollolake/rom.x.in
+++ b/src/platform/apollolake/rom.x.in
@@ -16,12 +16,12 @@ MEMORY
 {
   vector_reset_text :
         org = ROM_BASE,
-        len = 0x400
+        len = ROM_RESET_TEXT_SIZE
   vector_reset_lit :
-        org = ROM_BASE + 0x400,
-        len = 0x100
+        org = ROM_BASE + ROM_RESET_TEXT_SIZE,
+        len = ROM_RESET_LIT_SIZE
   vector_base_text :
-	org = ROM_BASE + 0x800,
+	org = ROM_BASE + ROM_RESET_TEXT_SIZE + ROM_RESET_LIT_SIZE,
         len = SOF_MEM_VECBASE_LIT_SIZE
   vector_int2_lit :
         org = ROM_BASE + XCHAL_INTLEVEL2_VECOFS - SOF_MEM_VECT_LIT_SIZE,
@@ -113,12 +113,8 @@ PHDRS
   vector_double_text_phdr PT_LOAD;
   sof_text_phdr PT_LOAD;
   sof_stack_phdr PT_LOAD;
-
-  static_log_entries_phdr PT_NOTE;
 }
 
-/*  Default entry point:  */
-ENTRY(_MainEntry)
 _rom_store_table = 0;
 
 /* ABI0 does not use Window base */
diff --git a/src/platform/cannonlake/include/platform/memory.h b/src/platform/cannonlake/include/platform/memory.h
index c00d90c24..339be446f 100644
--- a/src/platform/cannonlake/include/platform/memory.h
+++ b/src/platform/cannonlake/include/platform/memory.h
@@ -410,6 +410,12 @@
 #define SOF_MEM_RESET_LIT_SIZE		0x8
 #define SOF_MEM_VECBASE_LIT_SIZE	0x178
 
+#define SOF_MEM_RO_SIZE			0x8
+
+/* VM ROM sizes */
+#define ROM_RESET_TEXT_SIZE	0x400
+#define ROM_RESET_LIT_SIZE	0x200
+
 /* boot loader in IMR */
 #define IMR_BOOT_LDR_MANIFEST_BASE	0xB0032000
 #define IMR_BOOT_LDR_MANIFEST_SIZE	0x6000
diff --git a/src/platform/cannonlake/rom.x.in b/src/platform/cannonlake/rom.x.in
index 146bb7ce9..83c33d758 100644
--- a/src/platform/cannonlake/rom.x.in
+++ b/src/platform/cannonlake/rom.x.in
@@ -16,12 +16,12 @@ MEMORY
 {
   vector_reset_text :
         org = ROM_BASE,
-        len = 0x400
+        len = ROM_RESET_TEXT_SIZE
   vector_reset_lit :
-        org = ROM_BASE + 0x400,
-        len = 0x100
+        org = ROM_BASE + ROM_RESET_TEXT_SIZE,
+        len = ROM_RESET_LIT_SIZE
   vector_base_text :
-	org = ROM_BASE + 0x800,
+	org = ROM_BASE + ROM_RESET_TEXT_SIZE + ROM_RESET_LIT_SIZE,
         len = SOF_MEM_VECBASE_LIT_SIZE
   vector_int2_lit :
         org = ROM_BASE + XCHAL_INTLEVEL2_VECOFS - SOF_MEM_VECT_LIT_SIZE,
@@ -110,12 +110,8 @@ PHDRS
   vector_double_text_phdr PT_LOAD;
   sof_text_phdr PT_LOAD;
   sof_stack_phdr PT_LOAD;
-
-  static_log_entries_phdr PT_NOTE;
 }
 
-/*  Default entry point:  */
-ENTRY(_MainEntry)
 _rom_store_table = 0;
 
 /* ABI0 does not use Window base */
diff --git a/src/platform/icelake/include/platform/memory.h b/src/platform/icelake/include/platform/memory.h
index 39c2fcc71..88aa1a4d5 100644
--- a/src/platform/icelake/include/platform/memory.h
+++ b/src/platform/icelake/include/platform/memory.h
@@ -408,6 +408,10 @@
 
 #define SOF_MEM_RO_SIZE			0x8
 
+/* VM ROM sizes */
+#define ROM_RESET_TEXT_SIZE	0x400
+#define ROM_RESET_LIT_SIZE	0x200
+
 /* boot loader in IMR */
 #define IMR_BOOT_LDR_MANIFEST_BASE	0xB0032000
 #define IMR_BOOT_LDR_MANIFEST_SIZE	0x6000
diff --git a/src/platform/icelake/rom.x.in b/src/platform/icelake/rom.x.in
index 8140a564a..7d36c85b3 100644
--- a/src/platform/icelake/rom.x.in
+++ b/src/platform/icelake/rom.x.in
@@ -16,12 +16,12 @@ MEMORY
 {
   vector_reset_text :
         org = ROM_BASE,
-        len = 0x400
+        len = ROM_RESET_TEXT_SIZE
   vector_reset_lit :
-        org = ROM_BASE + 0x400,
-        len = 0x100
+        org = ROM_BASE + ROM_RESET_TEXT_SIZE,
+        len = ROM_RESET_LIT_SIZE
   vector_base_text :
-	org = ROM_BASE + 0x800,
+	org = ROM_BASE + ROM_RESET_TEXT_SIZE + ROM_RESET_LIT_SIZE,
         len = SOF_MEM_VECBASE_LIT_SIZE
   vector_int2_lit :
         org = ROM_BASE + XCHAL_INTLEVEL2_VECOFS - SOF_MEM_VECT_LIT_SIZE,
@@ -113,12 +113,8 @@ PHDRS
   vector_double_text_phdr PT_LOAD;
   sof_text_phdr PT_LOAD;
   sof_stack_phdr PT_LOAD;
-
-  static_log_entries_phdr PT_NOTE;
 }
 
-/*  Default entry point:  */
-ENTRY(_MainEntry)
 _rom_store_table = 0;
 
 /* ABI0 does not use Window base */
diff --git a/src/platform/suecreek/include/platform/memory.h b/src/platform/suecreek/include/platform/memory.h
index 5415ef6de..02e372e0b 100644
--- a/src/platform/suecreek/include/platform/memory.h
+++ b/src/platform/suecreek/include/platform/memory.h
@@ -357,6 +357,10 @@
 
 #define SOF_MEM_RO_SIZE			0x8
 
+/* VM ROM sizes */
+#define ROM_RESET_TEXT_SIZE	0x400
+#define ROM_RESET_LIT_SIZE	0x200
+
 /* code loader */
 #define BOOT_LDR_TEXT_ENTRY_BASE	0xBE000000
 #define BOOT_LDR_TEXT_ENTRY_SIZE	0x400