mirror of https://github.com/thesofproject/sof.git
module: fix cache synchronisation
Buffers, where modules are stored originally, don't need their caches to be synchronised - they're only used as a data storage and only accessed via cached aliases. But when final buffers are allocated, from which modules are actually run, those buffers do indeed need cache synchronisation. Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
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@ -686,9 +686,6 @@ static void __sparse_cache *lib_manager_allocate_store_mem(uint32_t size,
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return NULL;
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}
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dcache_invalidate_region(local_add, size);
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icache_invalidate_region(local_add, size);
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return local_add;
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}
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@ -64,16 +64,8 @@ static int llext_manager_load_data_from_storage(void __sparse_cache *vma, void *
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return ret;
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}
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ret = memcpy_s((__sparse_force void *)vma, size, s_addr, size);
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if (ret < 0)
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return ret;
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/* Some data can be accessed as uncached, in fact that's the default */
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/* Both D- and I-caches have been invalidated */
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dcache_writeback_region(vma, size);
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/* TODO: Change attributes for memory to FLAGS */
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return 0;
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return memcpy_s((__sparse_force void *)vma, size, s_addr, size);
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}
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static int llext_manager_load_module(uint32_t module_id, struct sof_man_module *mod,
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@ -98,12 +90,19 @@ static int llext_manager_load_module(uint32_t module_id, struct sof_man_module *
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if (ret < 0)
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return ret;
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/* .text contains instructions and it also often contains local data */
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dcache_writeback_region(va_base_text, st_text_size);
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icache_invalidate_region(va_base_text, st_text_size);
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/* Copy RODATA */
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ret = llext_manager_load_data_from_storage(va_base_rodata, src_rodata,
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st_rodata_size, SYS_MM_MEM_PERM_RW);
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if (ret < 0)
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goto e_text;
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/* Some data can be accessed as uncached, in fact that's the default */
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dcache_writeback_region(va_base_rodata, st_rodata_size);
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return 0;
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e_text:
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