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idc: modify idc payload size and align to cache line size 

Modify IDC payload size to be cache aligned and have size of 2 cache
lines.

Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
This commit is contained in:
Rafal Redzimski 2022-03-21 12:41:51 +01:00 committed by Liam Girdwood
parent efd6d4a3e4
commit a0e55830a0
1 changed files with 2 additions and 1 deletions
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3
src/include/sof/drivers/idc.h
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@ -20,6 +20,7 @@
#include <sof/trace/trace.h>
#include <user/trace.h>
#include <stdint.h>
#include <sof/lib/cache.h>
/** \brief IDC send blocking flag. */
#define IDC_BLOCKING 0
@ -96,7 +97,7 @@
#define iTS(x) (((x) >> IDC_TYPE_SHIFT) & IDC_TYPE_MASK)
/** \brief Max IDC message payload size in bytes. */
#define IDC_MAX_PAYLOAD_SIZE 96
#define IDC_MAX_PAYLOAD_SIZE (DCACHE_LINE_SIZE * 2)
/** \brief IDC free function flags */
#define IDC_FREE_IRQ_ONLY BIT(0) /**< disable only irqs */