mirror of https://github.com/thesofproject/sof.git
abi: ipc: Move mem caps and panics codes to coreect header.
Topology mem capabilities and trace panics codes should be in the correct header for their users. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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@ -38,6 +38,7 @@
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#include <sof/platform.h>
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#include <platform/memory.h>
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#include <arch/spinlock.h>
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#include <uapi/ipc/topology.h>
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struct sof;
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@ -36,7 +36,7 @@
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#include <config.h>
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#include <sof/mailbox.h>
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#include <sof/cpu.h>
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#include <uapi/ipc/header.h>
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#include <uapi/ipc/trace.h>
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#include <platform/platform.h>
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#include <platform/memory.h>
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#include <stdint.h>
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@ -139,34 +139,8 @@
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#define SOF_IPC_MSG_MAX_SIZE 384
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/*
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* SOF panic codes
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*/
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#define SOF_IPC_PANIC_MAGIC 0x0dead000
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#define SOF_IPC_PANIC_MAGIC_MASK 0x0ffff000
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#define SOF_IPC_PANIC_CODE_MASK 0x00000fff
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#define SOF_IPC_PANIC_MEM (SOF_IPC_PANIC_MAGIC | 0x0)
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#define SOF_IPC_PANIC_WORK (SOF_IPC_PANIC_MAGIC | 0x1)
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#define SOF_IPC_PANIC_IPC (SOF_IPC_PANIC_MAGIC | 0x2)
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#define SOF_IPC_PANIC_ARCH (SOF_IPC_PANIC_MAGIC | 0x3)
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#define SOF_IPC_PANIC_PLATFORM (SOF_IPC_PANIC_MAGIC | 0x4)
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#define SOF_IPC_PANIC_TASK (SOF_IPC_PANIC_MAGIC | 0x5)
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#define SOF_IPC_PANIC_EXCEPTION (SOF_IPC_PANIC_MAGIC | 0x6)
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#define SOF_IPC_PANIC_DEADLOCK (SOF_IPC_PANIC_MAGIC | 0x7)
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#define SOF_IPC_PANIC_STACK (SOF_IPC_PANIC_MAGIC | 0x8)
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#define SOF_IPC_PANIC_IDLE (SOF_IPC_PANIC_MAGIC | 0x9)
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#define SOF_IPC_PANIC_WFI (SOF_IPC_PANIC_MAGIC | 0xa)
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/*
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* SOF memory capabilities, add new ones at the end
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*/
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#define SOF_MEM_CAPS_RAM (1 << 0)
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#define SOF_MEM_CAPS_ROM (1 << 1)
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#define SOF_MEM_CAPS_EXT (1 << 2) /**< external */
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#define SOF_MEM_CAPS_LP (1 << 3) /**< low power */
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#define SOF_MEM_CAPS_HP (1 << 4) /**< high performance */
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#define SOF_MEM_CAPS_DMA (1 << 5) /**< DMA'able */
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#define SOF_MEM_CAPS_CACHE (1 << 6) /**< cacheable */
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#define SOF_MEM_CAPS_EXEC (1 << 7) /**< executable */
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/*
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* Command Header - Header for all IPC. Identifies IPC message.
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@ -86,6 +86,18 @@ struct sof_ipc_comp {
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* Component Buffers
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*/
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/*
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* SOF memory capabilities, add new ones at the end
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*/
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#define SOF_MEM_CAPS_RAM (1 << 0)
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#define SOF_MEM_CAPS_ROM (1 << 1)
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#define SOF_MEM_CAPS_EXT (1 << 2) /**< external */
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#define SOF_MEM_CAPS_LP (1 << 3) /**< low power */
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#define SOF_MEM_CAPS_HP (1 << 4) /**< high performance */
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#define SOF_MEM_CAPS_DMA (1 << 5) /**< DMA'able */
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#define SOF_MEM_CAPS_CACHE (1 << 6) /**< cacheable */
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#define SOF_MEM_CAPS_EXEC (1 << 7) /**< executable */
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/* create new component buffer - SOF_IPC_TPLG_BUFFER_NEW */
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struct sof_ipc_buffer {
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struct sof_ipc_comp comp;
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@ -67,6 +67,24 @@ struct sof_ipc_dma_trace_posn {
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* Commom debug
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*/
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/*
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* SOF panic codes
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*/
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#define SOF_IPC_PANIC_MAGIC 0x0dead000
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#define SOF_IPC_PANIC_MAGIC_MASK 0x0ffff000
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#define SOF_IPC_PANIC_CODE_MASK 0x00000fff
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#define SOF_IPC_PANIC_MEM (SOF_IPC_PANIC_MAGIC | 0x0)
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#define SOF_IPC_PANIC_WORK (SOF_IPC_PANIC_MAGIC | 0x1)
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#define SOF_IPC_PANIC_IPC (SOF_IPC_PANIC_MAGIC | 0x2)
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#define SOF_IPC_PANIC_ARCH (SOF_IPC_PANIC_MAGIC | 0x3)
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#define SOF_IPC_PANIC_PLATFORM (SOF_IPC_PANIC_MAGIC | 0x4)
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#define SOF_IPC_PANIC_TASK (SOF_IPC_PANIC_MAGIC | 0x5)
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#define SOF_IPC_PANIC_EXCEPTION (SOF_IPC_PANIC_MAGIC | 0x6)
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#define SOF_IPC_PANIC_DEADLOCK (SOF_IPC_PANIC_MAGIC | 0x7)
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#define SOF_IPC_PANIC_STACK (SOF_IPC_PANIC_MAGIC | 0x8)
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#define SOF_IPC_PANIC_IDLE (SOF_IPC_PANIC_MAGIC | 0x9)
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#define SOF_IPC_PANIC_WFI (SOF_IPC_PANIC_MAGIC | 0xa)
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/* panic info include filename and line number */
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struct sof_ipc_panic_info {
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char filename[SOF_TRACE_FILENAME_SIZE];
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