abi: ipc: Move mem caps and panics codes to coreect header.

Topology mem capabilities and trace panics codes should be in the
correct header for their users.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
This commit is contained in:
Liam Girdwood 2018-12-03 16:57:49 +00:00 committed by Liam Girdwood
parent 30007ca825
commit a0cfe1e231
5 changed files with 32 additions and 27 deletions

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@ -38,6 +38,7 @@
#include <sof/platform.h>
#include <platform/memory.h>
#include <arch/spinlock.h>
#include <uapi/ipc/topology.h>
struct sof;

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@ -36,7 +36,7 @@
#include <config.h>
#include <sof/mailbox.h>
#include <sof/cpu.h>
#include <uapi/ipc/header.h>
#include <uapi/ipc/trace.h>
#include <platform/platform.h>
#include <platform/memory.h>
#include <stdint.h>

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@ -139,34 +139,8 @@
#define SOF_IPC_MSG_MAX_SIZE 384
/*
* SOF panic codes
*/
#define SOF_IPC_PANIC_MAGIC 0x0dead000
#define SOF_IPC_PANIC_MAGIC_MASK 0x0ffff000
#define SOF_IPC_PANIC_CODE_MASK 0x00000fff
#define SOF_IPC_PANIC_MEM (SOF_IPC_PANIC_MAGIC | 0x0)
#define SOF_IPC_PANIC_WORK (SOF_IPC_PANIC_MAGIC | 0x1)
#define SOF_IPC_PANIC_IPC (SOF_IPC_PANIC_MAGIC | 0x2)
#define SOF_IPC_PANIC_ARCH (SOF_IPC_PANIC_MAGIC | 0x3)
#define SOF_IPC_PANIC_PLATFORM (SOF_IPC_PANIC_MAGIC | 0x4)
#define SOF_IPC_PANIC_TASK (SOF_IPC_PANIC_MAGIC | 0x5)
#define SOF_IPC_PANIC_EXCEPTION (SOF_IPC_PANIC_MAGIC | 0x6)
#define SOF_IPC_PANIC_DEADLOCK (SOF_IPC_PANIC_MAGIC | 0x7)
#define SOF_IPC_PANIC_STACK (SOF_IPC_PANIC_MAGIC | 0x8)
#define SOF_IPC_PANIC_IDLE (SOF_IPC_PANIC_MAGIC | 0x9)
#define SOF_IPC_PANIC_WFI (SOF_IPC_PANIC_MAGIC | 0xa)
/*
* SOF memory capabilities, add new ones at the end
*/
#define SOF_MEM_CAPS_RAM (1 << 0)
#define SOF_MEM_CAPS_ROM (1 << 1)
#define SOF_MEM_CAPS_EXT (1 << 2) /**< external */
#define SOF_MEM_CAPS_LP (1 << 3) /**< low power */
#define SOF_MEM_CAPS_HP (1 << 4) /**< high performance */
#define SOF_MEM_CAPS_DMA (1 << 5) /**< DMA'able */
#define SOF_MEM_CAPS_CACHE (1 << 6) /**< cacheable */
#define SOF_MEM_CAPS_EXEC (1 << 7) /**< executable */
/*
* Command Header - Header for all IPC. Identifies IPC message.

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@ -86,6 +86,18 @@ struct sof_ipc_comp {
* Component Buffers
*/
/*
* SOF memory capabilities, add new ones at the end
*/
#define SOF_MEM_CAPS_RAM (1 << 0)
#define SOF_MEM_CAPS_ROM (1 << 1)
#define SOF_MEM_CAPS_EXT (1 << 2) /**< external */
#define SOF_MEM_CAPS_LP (1 << 3) /**< low power */
#define SOF_MEM_CAPS_HP (1 << 4) /**< high performance */
#define SOF_MEM_CAPS_DMA (1 << 5) /**< DMA'able */
#define SOF_MEM_CAPS_CACHE (1 << 6) /**< cacheable */
#define SOF_MEM_CAPS_EXEC (1 << 7) /**< executable */
/* create new component buffer - SOF_IPC_TPLG_BUFFER_NEW */
struct sof_ipc_buffer {
struct sof_ipc_comp comp;

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@ -67,6 +67,24 @@ struct sof_ipc_dma_trace_posn {
* Commom debug
*/
/*
* SOF panic codes
*/
#define SOF_IPC_PANIC_MAGIC 0x0dead000
#define SOF_IPC_PANIC_MAGIC_MASK 0x0ffff000
#define SOF_IPC_PANIC_CODE_MASK 0x00000fff
#define SOF_IPC_PANIC_MEM (SOF_IPC_PANIC_MAGIC | 0x0)
#define SOF_IPC_PANIC_WORK (SOF_IPC_PANIC_MAGIC | 0x1)
#define SOF_IPC_PANIC_IPC (SOF_IPC_PANIC_MAGIC | 0x2)
#define SOF_IPC_PANIC_ARCH (SOF_IPC_PANIC_MAGIC | 0x3)
#define SOF_IPC_PANIC_PLATFORM (SOF_IPC_PANIC_MAGIC | 0x4)
#define SOF_IPC_PANIC_TASK (SOF_IPC_PANIC_MAGIC | 0x5)
#define SOF_IPC_PANIC_EXCEPTION (SOF_IPC_PANIC_MAGIC | 0x6)
#define SOF_IPC_PANIC_DEADLOCK (SOF_IPC_PANIC_MAGIC | 0x7)
#define SOF_IPC_PANIC_STACK (SOF_IPC_PANIC_MAGIC | 0x8)
#define SOF_IPC_PANIC_IDLE (SOF_IPC_PANIC_MAGIC | 0x9)
#define SOF_IPC_PANIC_WFI (SOF_IPC_PANIC_MAGIC | 0xa)
/* panic info include filename and line number */
struct sof_ipc_panic_info {
char filename[SOF_TRACE_FILENAME_SIZE];