mirror of https://github.com/thesofproject/sof.git
coredump-reader: print exception cause and location
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@linux.intel.com>
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@ -49,6 +49,41 @@ VALID_ARCHS = {}
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]]
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]
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# Exception casues:
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# CODE: [Exception cause, excvaddr loaded]
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EXCCAUSE_CODE = {
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0: ["IllegalInstructionCause: Illegal instruction", False],
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1: ["SyscallCause: SYSCALL instruction", True],
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2: ["InstructionFetchErrorCause: Processor internal physical address or data error during instruction fetch", True],
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3: ["LoadStoreErrorCause: Processor internal physical address or data error during load or store", True],
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4: ["Level1InterruptCause: Level-1 interrupt as indicated by set level-1 bits in the INTERRUPT register", False],
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5: ["AllocaCause: MOVSP instruction, if caller's registers are not in the register file", False],
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6: ["IntegerDivideByZeroCause: QUOS, QUOU, REMS, or REMU divisor operand is zero", False],
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8: ["PrivilegedCause: Attempt to execute a privileged operation when CRING ? 0", False],
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9: ["LoadStoreAlignmentCause: Load or store to an unaligned address", True],
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12: ["InstrPIFDataErrorCause: PIF data error during instruction fetch", True],
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13: ["LoadStorePIFDataErrorCause: ynchronous PIF data error during LoadStore access", True],
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14: ["InstrPIFAddrErrorCause: PIF address error during instruction fetch", True],
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15: ["LoadStorePIFAddrErrorCause: Synchronous PIF address error during LoadStore access", True],
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16: ["InstTLBMissCause: Error during Instruction TLB refill", True],
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17: ["InstTLBMultiHitCause: Multiple instruction TLB entries matched", True],
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18: ["InstFetchPrivilegeCause: An instruction fetch referenced a virtual address at a ring level less than CRING", True],
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20: ["InstFetchProhibitedCause: An instruction fetch referenced a page mapped with an attribute that does not permit instruction fetch", True],
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24: ["LoadStoreTLBMissCause: Error during TLB refill for a load or store", True],
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25: ["LoadStoreTLBMultiHitCause: Multiple TLB entries matched for a load or store", True],
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26: ["LoadStorePrivilegeCause: A load or store referenced a virtual address at a ring level less than CRING", True],
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28: ["LoadProhibitedCause: A load referenced a page mapped with an attribute that does not permit loads", True],
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29: ["StoreProhibitedCause: A store referenced a page mapped with an attribute that does not permit stores", True],
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32: ["CoprocessornDisabled: Coprocessor n instruction when cpn disabled. n varies 0..7 as the cause varies 32..39", False],
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33: ["CoprocessornDisabled: Coprocessor n instruction when cpn disabled. n varies 0..7 as the cause varies 32..39", False],
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34: ["CoprocessornDisabled: Coprocessor n instruction when cpn disabled. n varies 0..7 as the cause varies 32..39", False],
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35: ["CoprocessornDisabled: Coprocessor n instruction when cpn disabled. n varies 0..7 as the cause varies 32..39", False],
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36: ["CoprocessornDisabled: Coprocessor n instruction when cpn disabled. n varies 0..7 as the cause varies 32..39", False],
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37: ["CoprocessornDisabled: Coprocessor n instruction when cpn disabled. n varies 0..7 as the cause varies 32..39", False],
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38: ["CoprocessornDisabled: Coprocessor n instruction when cpn disabled. n varies 0..7 as the cause varies 32..39", False],
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39: ["CoprocessornDisabled: Coprocessor n instruction when cpn disabled. n varies 0..7 as the cause varies 32..39", False]
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}
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def valid_archs_print():
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archs = ''.join("{0}, ".format(x) for x in VALID_ARCHS)
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archs = archs[:len(archs)-2]
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@ -672,7 +707,6 @@ class CoreDumpReader(object):
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verbosePrint(self.core_dump.windowstart_process())
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verbosePrint("# Location: " + str(self.file_info));
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stack_base = self.core_dump.stackptr
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stack_dw_num = int(len(self.stack)/AR_WINDOW_WIDTH)
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verbosePrint("# Stack dumped from {:08x} dwords num {:d}"
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@ -690,9 +724,18 @@ class CoreDumpReader(object):
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stdoutPrint("set *0x{:08x}=0x{:08x}\n"
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.format(addr, dw))
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if self.core_dump.exccause:
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verbosePrint("\n# *EXCEPTION*\n")
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verbosePrint("# exccause: " + EXCCAUSE_CODE[self.core_dump.exccause][0])
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if EXCCAUSE_CODE[self.core_dump.exccause][1]:
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verbosePrint("# excvaddr: " + str(self.core_dump.excvaddr))
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stdoutPrint('p "Exception location:"\nlist *$epc1\n');
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else:
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verbosePrint("# Location: " + str(self.file_info));
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# TODO: if excsave1 is not empty, pc should be set to that value
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# (exception mode, not forced panic mode)
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stdoutPrint("set $pc=&arch_dump_regs_a\nbacktrace\n")
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stdoutPrint('set $pc=&arch_dump_regs_a\np "backtrace"\nbacktrace\n')
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stdoutClose()
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if __name__ == "__main__":
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