From 9b507ecc82d9d9db1b8d4c72809de4fc8c05d77d Mon Sep 17 00:00:00 2001
From: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Date: Thu, 9 Feb 2023 15:45:35 +0100
Subject: [PATCH] config: set cached and uncached aliases for affected
 platforms

Set cached and uncached address aliases for all Intel ADSP platforms,
supported by Zephyr.

Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
---
 config/mtl.toml        | 8 ++++++++
 config/tgl-h-cavs.toml | 8 ++++++++
 config/tgl-h.toml      | 8 ++++++++
 config/tgl.toml        | 8 ++++++++
 4 files changed, 32 insertions(+)

diff --git a/config/mtl.toml b/config/mtl.toml
index 758f6f34d..ee50cbfe0 100644
--- a/config/mtl.toml
+++ b/config/mtl.toml
@@ -3,6 +3,7 @@ version = [3, 0]
 [adsp]
 name = "mtl"
 image_size = "0x2C0000" # (22) bank * 128KB
+alias_mask = "0xE0000000"
 
 [[adsp.mem_zone]]
 type = "ROM"
@@ -17,6 +18,13 @@ type = "SRAM"
 base = "0xa00f0000"
 size = "0x100000"
 
+[[adsp.mem_alias]]
+type = "uncached"
+base = "0x40000000"
+[[adsp.mem_alias]]
+type = "cached"
+base = "0xA0000000"
+
 [cse]
 partition_name = "ADSP"
 [[cse.entry]]
diff --git a/config/tgl-h-cavs.toml b/config/tgl-h-cavs.toml
index 75429596e..cab16a436 100644
--- a/config/tgl-h-cavs.toml
+++ b/config/tgl-h-cavs.toml
@@ -3,6 +3,7 @@ version = [2, 5]
 [adsp]
 name = "tgl"
 image_size = "0x1F0000" # (30 + 1) bank * 64KB
+alias_mask = "0xE0000000"
 
 [[adsp.mem_zone]]
 type = "ROM"
@@ -21,6 +22,13 @@ type = "LP-SRAM"
 base = "0xBE800000"
 size = "0x40"
 
+[[adsp.mem_alias]]
+type = "uncached"
+base = "0x9E000000"
+[[adsp.mem_alias]]
+type = "cached"
+base = "0xBE000000"
+
 [cse]
 partition_name = "ADSP"
 [[cse.entry]]
diff --git a/config/tgl-h.toml b/config/tgl-h.toml
index 908c3bfc8..997e1a832 100644
--- a/config/tgl-h.toml
+++ b/config/tgl-h.toml
@@ -3,6 +3,7 @@ version = [2, 5]
 [adsp]
 name = "tgl"
 image_size = "0x1F0000" # (30 + 1) bank * 64KB
+alias_mask = "0xE0000000"
 
 [[adsp.mem_zone]]
 type = "ROM"
@@ -17,6 +18,13 @@ type = "SRAM"
 base = "0xBE040000"
 size = "0x100000"
 
+[[adsp.mem_alias]]
+type = "uncached"
+base = "0x9E000000"
+[[adsp.mem_alias]]
+type = "cached"
+base = "0xBE000000"
+
 [cse]
 partition_name = "ADSP"
 [[cse.entry]]
diff --git a/config/tgl.toml b/config/tgl.toml
index d6183faf5..9a64c694c 100644
--- a/config/tgl.toml
+++ b/config/tgl.toml
@@ -3,6 +3,7 @@ version = [2, 5]
 [adsp]
 name = "tgl"
 image_size = "0x2F0000" # (46 + 1) bank * 64KB
+alias_mask = "0xE0000000"
 
 [[adsp.mem_zone]]
 type = "ROM"
@@ -17,6 +18,13 @@ type = "SRAM"
 base = "0xBE040000"
 size = "0x100000"
 
+[[adsp.mem_alias]]
+type = "uncached"
+base = "0x9E000000"
+[[adsp.mem_alias]]
+type = "cached"
+base = "0xBE000000"
+
 [cse]
 partition_name = "ADSP"
 [[cse.entry]]