mirror of https://github.com/thesofproject/sof.git
pipeline: use 1ms tick for low latency pipeline.
Change tick from 1.3ms to 1ms to improve latency. Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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@ -203,9 +203,11 @@ static int mixer_copy(struct comp_dev *dev)
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{
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struct mixer_data *md = comp_get_drvdata(dev);
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struct comp_buffer *sink, *sources[5], *source;
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uint32_t i = 0, cframes = 64;
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uint32_t i = 0, cframes = PIPELINE_LL_FRAMES;
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struct list_item * blist;
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trace_mixer("Mix");
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/* calculate the highest status between input streams */
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list_for_item(blist, &dev->bsource_list) {
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source = container_of(blist, struct comp_buffer, sink_list);
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@ -397,7 +397,9 @@ static int volume_copy(struct comp_dev *dev)
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{
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struct comp_data *cd = comp_get_drvdata(dev);
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struct comp_buffer *sink, *source;
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uint32_t cframes = 64;
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uint32_t cframes = PIPELINE_LL_FRAMES;
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trace_comp("Vol");
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/* volume components will only ever have 1 source and 1 sink buffer */
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source = list_first_item(&dev->bsource_list, struct comp_buffer, sink_list);
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@ -55,13 +55,16 @@
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#define PLATFORM_MAX_STREAMS 5
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/* Platform Host DMA buffer config - these should align with DMA engine */
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#define PLAT_HOST_PERSIZE 256 /* must be multiple of DMA burst size */
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#define PLAT_HOST_PERSIZE 192 /* must be multiple of DMA burst size */
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#define PLAT_HOST_PERIODS 2 /* give enough latency for DMA refill */
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/* Platform Dev DMA buffer config - these should align with DMA engine */
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#define PLAT_DEV_PERSIZE 256 /* must be multiple of DMA+DEV burst size */
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#define PLAT_DEV_PERSIZE 192 /* must be multiple of DMA+DEV burst size */
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#define PLAT_DEV_PERIODS 2 /* give enough latency for DMA refill */
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/* Pipeline low latency frames per copy - TODO should come from config */
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#define PIPELINE_LL_FRAMES 48
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/* DMA channel drain timeout in microseconds */
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#define PLATFORM_DMA_TIMEOUT 1333
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