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Topology: Add volume control into SRC playback pipeline 

This patch adds a volume component after SRC to be able to convert
the variable pipeline s16/s24/s32 PCM format into PCM format used
by DAI. The PCM capabilities are changed to allow all formats.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This commit is contained in:
Seppo Ingalsuo 2019-01-03 19:13:56 +02:00 committed by Liam Girdwood
parent 81e0333e19
commit 843553646a
2 changed files with 30 additions and 7 deletions
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7
src/audio/src_hifi3.c
View File

@ -458,7 +458,7 @@ void src_polyphase_stage_cir_s16(struct src_stage_prm *s)
* 11x address pointers,
*/
ae_int32x2 q = AE_ZERO32();
ae_int16x4 d;
ae_int16x4 d = AE_ZERO16();
ae_f32 *rp;
ae_f32 *wp;
int i;
@ -508,8 +508,9 @@ void src_polyphase_stage_cir_s16(struct src_stage_prm *s)
n_min = (m < n_wrap_buf) ? m : n_wrap_buf;
m -= n_min;
for (i = 0; i < n_min; i++) {
/* Load a 16 bits sample and left shift by 16,
* advance read and write pointers.
/* Load a 16 bits sample into d and left shift
* by 16 into q, advance read and write
* pointers.
*/
AE_L16_XP(d, (ae_int16 *)x_rptr,
sizeof(ae_int16));

30
tools/topology/sof/pipe-src-playback.m4
View File

@ -9,9 +9,23 @@ include(`utils.m4')
include(`src.m4')
include(`buffer.m4')
include(`pcm.m4')
include(`pga.m4')
include(`dai.m4')
include(`mixercontrol.m4')
include(`pipeline.m4')
#
# Controls
#
# Volume Mixer control with max value of 32
C_CONTROLMIXER(Master Playback Volume, PIPELINE_ID,
CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256),
CONTROLMIXER_MAX(, 32),
false,
CONTROLMIXER_TLV(TLV 32 steps from -90dB to +6dB for 3dB, vtlv_m90s3),
Channel register and shift for Front Left/Right,
LIST(` ', KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1)))
#
# Components and Buffers
#
@ -31,35 +45,43 @@ W_DATA(media_src_conf, media_src_tokens)
# "SRC" has 3 source and 3 sink periods
W_SRC(0, PIPELINE_FORMAT, 3, 3, media_src_conf, 2)
# "Volume" has 2 source and 2 sink periods
W_PGA(0, PIPELINE_FORMAT, 2, 2, 2, LIST(` ', "Master Playback Volume PIPELINE_ID"))
# Playback Buffers
W_BUFFER(0, COMP_BUFFER_SIZE(3,
COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES),
PLATFORM_HOST_MEM_CAP)
W_BUFFER(1, COMP_BUFFER_SIZE(3,
COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES),
PLATFORM_HOST_MEM_CAP)
W_BUFFER(2, COMP_BUFFER_SIZE(2,
COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, SCHEDULE_FRAMES),
PLATFORM_DAI_MEM_CAP)
#
# Pipeline Graph
#
# host PCM_P --> B0 --> SRC 0 --> B1 --> sink DAI0
# host PCM_P --> B0 --> SRC 0 --> B1 Volume 0 --> B2 --> sink DAI0
P_GRAPH(pipe-pass-src-playback-PIPELINE_ID, PIPELINE_ID,
LIST(` ',
`dapm(N_PCMP(PCM_ID), SRC Playback PCM_ID)',
`dapm(N_BUFFER(0), N_PCMP(PCM_ID))',
`dapm(N_SRC(0), N_BUFFER(0))',
`dapm(N_BUFFER(1), N_SRC(0))'))
`dapm(N_BUFFER(1), N_SRC(0))',
`dapm(N_PGA(0), N_BUFFER(1))',
`dapm(N_BUFFER(2), N_PGA(0))'))
#
# Pipeline Source and Sinks
#
indir(`define', concat(`PIPELINE_SOURCE_', PIPELINE_ID), N_BUFFER(1))
indir(`define', concat(`PIPELINE_SOURCE_', PIPELINE_ID), N_BUFFER(2))
indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), SRC Playback PCM_ID)
#
# PCM Configuration
#
PCM_CAPABILITIES(SRC Playback PCM_ID, `S24_LE', 8000, 192000, 2, PIPELINE_CHANNELS, 2, 16, 192, 16384, 65536, 65536)
PCM_CAPABILITIES(SRC Playback PCM_ID, `S32_LE,S24_LE,S16_LE', 8000, 192000, 2, PIPELINE_CHANNELS, 2, 16, 192, 16384, 65536, 65536)