mirror of https://github.com/thesofproject/sof.git
dai: support for amd specific hs dai id
Add support for hs i2s instance on rembrandt platform. Signed-off-by: Balakishorepati <balaKishore.pati@amd.com>
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@ -89,6 +89,7 @@ enum sof_ipc_dai_type {
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SOF_DAI_AMD_BT, /**< Amd BT */
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SOF_DAI_AMD_SP, /**< Amd SP */
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SOF_DAI_AMD_DMIC, /**< Amd DMIC */
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SOF_DAI_AMD_HS, /**< Amd HS */
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SOF_DAI_MEDIATEK_AFE /**< Mtk AFE */
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};
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@ -117,6 +118,7 @@ struct sof_ipc_dai_config {
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struct sof_ipc_dai_acp_params acpbt;
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struct sof_ipc_dai_acp_params acpsp;
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struct sof_ipc_dai_acpdmic_params acpdmic;
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struct sof_ipc_dai_acp_params acphs;
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struct sof_ipc_dai_afe_params afe;
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};
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} __attribute__((packed, aligned(4)));
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2021 AMD. All rights reserved.
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* Copyright(c) 2022 AMD. All rights reserved.
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*
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* Author: Basavaraj Hiregoudar <basavaraj.hiregoudar@amd.com>
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* Anup Kulkarni<anup.kulkarni@amd.com>
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@ -17,7 +17,11 @@
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#include <user/trace.h>
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#if CONFIG_AMD_BT
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#define ACP_BT_ENABLE
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#define ACP_BT_ENABLE
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#endif
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#if CONFIG_AMD_SP
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#define ACP_SP_ENABLE
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#endif
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int acp_dma_init(struct sof *sof);
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@ -25,19 +29,23 @@ int acp_dma_init(struct sof *sof);
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#define ACP_DMA_BUFFER_PERIOD_COUNT 2
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/* default max number of channels supported */
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#define ACP_DEFAULT_NUM_CHANNELS 2
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#define ACP_DEFAULT_NUM_CHANNELS 2
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/* default sample rate */
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#define ACP_DEFAULT_SAMPLE_RATE 48000
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#define ACP_DEFAULT_SAMPLE_RATE 48000
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#define ACP_DMA_BUFFER_ALIGN 64
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#define ACP_DMA_BUFFER_ALIGN_128 128
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#define ACP_DMA_TRANS_SIZE 64
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#define ACP_DMA_TRANS_SIZE_128 128
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#define ACP_DAI_DMA_BUFFER_PERIOD_COUNT 2
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#define ACP_DRAM_ADDRESS_MASK 0x0FFFFFFF
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#define ACP_DMA_BUFFER_ALIGN 64
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#define ACP_DMA_TRANS_SIZE 64
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#define ACP_DAI_DMA_BUFFER_PERIOD_COUNT 2
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#define ACP_DRAM_ADDRESS_MASK 0x0FFFFFFF
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extern const struct dai_driver acp_spdai_driver;
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extern const struct dai_driver acp_btdai_driver;
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extern const struct dai_driver acp_dmic_dai_driver;
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extern const struct dai_driver acp_hsdai_driver;
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/* ACP private data */
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struct acp_pdata {
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@ -52,10 +52,9 @@ struct comp_buffer;
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#define DMA_CAP_HDA BIT(0) /**< HDA DMA */
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#define DMA_CAP_GP_LP BIT(1) /**< GP LP DMA */
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#define DMA_CAP_GP_HP BIT(2) /**< GP HP DMA */
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#define DMA_CAP_BT BIT(3) /**< DMA I2S */
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#define DMA_CAP_BT BIT(3) /**< BT DMA */
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#define DMA_CAP_SP BIT(4) /**< SP DMA */
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#define DMA_CAP_DMIC BIT(5) /**< ACP DMA DMIC > */
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/* DMA dev type bitmasks used to define the type of DMA */
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#define DMA_DEV_HOST BIT(0) /**< connectable to host */
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@ -73,6 +73,10 @@ int dai_config_dma_channel(struct comp_dev *dev, void *spec_config)
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channel = dai_get_handshake(dd->dai, dai->direction,
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dd->stream_id);
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break;
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case SOF_DAI_AMD_HS:
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channel = dai_get_handshake(dd->dai, dai->direction,
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dd->stream_id);
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break;
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case SOF_DAI_MEDIATEK_AFE:
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handshake = dai_get_handshake(dd->dai, dai->direction,
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dd->stream_id);
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@ -157,6 +161,9 @@ int ipc_dai_data_config(struct comp_dev *dev)
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dev->ipc_config.frame_fmt = SOF_IPC_FRAME_S32_LE;
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dd->dma_buffer->stream.frame_fmt = dev->ipc_config.frame_fmt;
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break;
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case SOF_DAI_AMD_HS:
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dev->ipc_config.frame_fmt = SOF_IPC_FRAME_S16_LE;
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break;
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case SOF_DAI_MEDIATEK_AFE:
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break;
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default:
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