mirror of https://github.com/thesofproject/sof.git
topology1: test topology for tgl nocodec mux
Add test topology for muxing 2 pipelines into 1 with SSP dai and capturing the result from loopback. Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
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@ -23,6 +23,7 @@ set(TPLGS
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"sof-hda-asrc\;sof-hda-asrc-2ch\;-DCHANNELS=2"
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"sof-tgl-nocodec-ci\;sof-tgl-nocodec-ci"
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"sof-tgl-nocodec-ci\;sof-adl-nocodec-ci"
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"sof-tgl-nocodec-mux\;sof-tgl-nocodec-mux"
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"sof-hda-generic-kwd\;sof-hda-generic-2ch-kwd\;-DCHANNELS=2\;-DDYNAMIC=1"
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"sof-hda-generic-kwd\;sof-hda-generic-4ch-kwd\;-DCHANNELS=4\;-DDYNAMIC=1"
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)
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@ -0,0 +1,143 @@
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#
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# Topology for Tigerlake RVP board CI testing, with covering as more
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# features as possible running with no codec machine.
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#
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# TGL Host GW DMAC support max 6 playback and max 6 capture channels so some
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# pipelines/PCMs/DAIs are commented out to keep within HW bounds. If these
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# are needed then they can be used provided other PCMs/pipelines/SSPs are
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# commented out in their place.
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# Include topology builder
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include(`utils.m4')
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include(`dai.m4')
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include(`ssp.m4')
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include(`muxdemux.m4')
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include(`bytecontrol.m4')
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include(`pipeline.m4')
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# Include TLV library
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include(`common/tlv.m4')
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# Include Token library
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include(`sof/tokens.m4')
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# Include Tigerlake DSP configuration
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include(`platform/intel/tgl.m4')
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define(PIPE_NAME, pipe-tgl-mux)
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#
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# Define the demux configure
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#
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dnl Configure demux
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dnl name, pipeline_id, routing_matrix_rows
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dnl Diagonal 1's in routing matrix mean that every input channel is
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dnl copied to corresponding output channels in all output streams.
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dnl I.e. row index is the input channel, 1 means it is copied to
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dnl corresponding output channel (column index), 0 means it is discarded.
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dnl There's a separate matrix for all outputs.
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define(matrix1, `ROUTE_MATRIX(2,
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`BITS_TO_BYTE(1, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 1, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)')')
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define(matrix2, `ROUTE_MATRIX(3,
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`BITS_TO_BYTE(0, 0, 1 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,1 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)',
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`BITS_TO_BYTE(0, 0, 0 ,0 ,0 ,0 ,0 ,0)')')
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dnl name, num_streams, route_matrix list
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MUXDEMUX_CONFIG(demux_priv_1, 2, LIST_NONEWLINE(`', `matrix1,', `matrix2'))
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#define SSP_MCLK
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define(`SSP_MCLK', 38400000)
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# playback DAI is SSP0 using 2 periods
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# Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-mux-dai-playback.m4,
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1, SSP, 0, NoCodec-0,
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NOT_USED_IGNORED, 2, s16le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER,
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4, 48000)
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dnl PIPELINE_PCM_ADD(pipeline,
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dnl pipe id, pcm, max channels, format,
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dnl period, priority, core,
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dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
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dnl time_domain, sched_comp)
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# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s16le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-host-playback.m4,
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2, 0, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000,
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SCHEDULE_TIME_DOMAIN_TIMER,
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PIPELINE_PLAYBACK_SCHED_COMP_1)
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# Low Latency playback pipeline 3 on PCM 1 using max 2 channels of s16le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-host-playback.m4,
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3, 1, 2, s32le,
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1000, 0, 0,
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48000, 48000, 48000,
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SCHEDULE_TIME_DOMAIN_TIMER,
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PIPELINE_PLAYBACK_SCHED_COMP_1)
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# Volume-switch capture pipeline 2 on PCM 0 using max 2 channels of s32le.
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# Schedule 48 frames per 1000us deadline with priority 0 on core 0
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PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
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4, 0, 4, s32le,
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1000, 0, 0,
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48000, 48000, 48000)
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#
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# DAIs configuration
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#
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dnl DAI_ADD(pipeline,
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dnl pipe id, dai type, dai_index, dai_be,
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dnl buffer, periods, format,
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dnl deadline, priority, core, time_domain)
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# capture DAI is SSP0 using 2 periods
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# Buffers use s16le format, with 48 frame per 1000us on core 0 with priority 0
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DAI_ADD(sof/pipe-dai-capture.m4,
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4, SSP, 0, NoCodec-0,
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PIPELINE_SINK_4, 2, s16le,
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1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
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# Connect pipelines together
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SectionGraph."PIPE_NAME" {
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index "0"
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lines [
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# PCM pipeline 3 to DAI pipeline 1
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dapm(PIPELINE_MUX_1, PIPELINE_SOURCE_2)
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# PCM pipeline 4 to DAI pipeline 1
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dapm(PIPELINE_MUX_1, PIPELINE_SOURCE_3)
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]
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}
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dnl PCM_DUPLEX_ADD(name, pcm_id, playback, capture)
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PCM_DUPLEX_ADD(Port0, 0, PIPELINE_PCM_2, PIPELINE_PCM_4)
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PCM_PLAYBACK_ADD(Media Playback MUX 1, 1, PIPELINE_PCM_3)
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#
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# BE configurations - overrides config in ACPI if present
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#
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DAI_CONFIG(SSP, 0, 0, NoCodec-0,
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SSP_CONFIG(I2S, SSP_CLOCK(mclk, 38400000, codec_mclk_in),
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SSP_CLOCK(bclk, 4800000, codec_slave),
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SSP_CLOCK(fsync, 48000, codec_slave),
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SSP_TDM(4, 25, 15, 15),
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SSP_CONFIG_DATA(SSP, 0, 24, 0, SSP_QUIRK_LBM)))
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