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drivers: imx: interrupt: Adjust IRQ_STEER registers for i.MX8 

On i.MX8MP the interrupt registers are mapped in the following fashion:

* Interrupts 0-31 at register 0x14
* Interrutps 32-63 at register 0x10
* Interrupts 64-95 at register 0x0C
* Interrupts 96-127 at register 0x08
* Interrupts 128-159 at register 0x04

Interrupts 0-31 map to one of the IRQ_STEER lines, 32-95 to another
and 96-159 to another. To not change the in-driver logic we falsely
shift the interrupts by 32, so 32-63 map to a line, 64-127 to another
and 128-191 to another. Now the valid interrupt numbers are shifted
from 0-160 to 32-191.

We also update REGISTERS_NUM to 6 even though one of the registers will
never be accessed due to bounds checking with RESERVED_IRQS_NUM. In fact
accessing those registers would lead to incorrect behavior.

So we use this kind of reverse mapping similar to on 8QXP/8QM except
that the reserved interrupts, rather than being reserved in hardware,
don't actually exist.

The only remaining effect to consider is that the interrupt numbers
must be shifted from what the datasheet says in order to correctly
register them.

Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
This commit is contained in:
Paul Olaru 2020-03-18 16:42:40 +02:00 committed by Daniel Baluta
parent cb5ab2ba2c
commit 819a58667e
1 changed files with 6 additions and 6 deletions
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12
src/platform/imx8m/include/platform/drivers/interrupt.h
View File

@ -105,15 +105,15 @@ int irqstr_get_sof_int(int irqstr_int);
*/
#define IRQSTR_CHANCTL 0x00
#define IRQSTR_CH_MASK(n) (0x04 + 0x04 * (n))
#define IRQSTR_CH_SET(n) (0x18 + 0x04 * (n))
#define IRQSTR_CH_STATUS(n) (0x2C + 0x04 * (n))
#define IRQSTR_CH_MASK(n) (0x04 + 0x04 * (5 - (n)))
#define IRQSTR_CH_SET(n) (0x18 + 0x04 * (5 - (n)))
#define IRQSTR_CH_STATUS(n) (0x2C + 0x04 * (5 - (n)))
#define IRQSTR_MASTER_DISABLE 0x40
#define IRQSTR_MASTER_STATUS 0x44
#define IRQSTR_RESERVED_IRQS_NUM 0
#define IRQSTR_IRQS_NUM 160
#define IRQSTR_IRQS_REGISTERS_NUM 5
#define IRQSTR_RESERVED_IRQS_NUM 32
#define IRQSTR_IRQS_NUM 192
#define IRQSTR_IRQS_REGISTERS_NUM 6
#define IRQSTR_IRQS_PER_LINE 64
#endif /* __PLATFORM_DRIVERS_INTERRUPT_H__ */