Merge pull request #601 from mrajwa/icl_work

DMIC: Added power gating.
This commit is contained in:
Liam Girdwood 2018-11-21 14:57:28 +00:00 committed by GitHub
commit 7d661d3979
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4 changed files with 22 additions and 0 deletions

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@ -246,6 +246,9 @@
/* DMIC power ON bit */
#define DMICLCTL_SPA ((uint32_t) BIT(0))
/* DMIC disable clock gating */
#define DMIC_DCGD ((uint32_t) BIT(30))
#ifndef ASSEMBLY
static inline uint16_t shim_read16(uint16_t reg)

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@ -243,6 +243,9 @@
/* DMIC power ON bit */
#define DMICLCTL_SPA ((uint32_t) BIT(0))
/* DMIC disable clock gating */
#define DMIC_DCGD ((uint32_t) BIT(30))
#ifndef ASSEMBLY
static inline uint16_t shim_read16(uint16_t reg)

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@ -109,6 +109,13 @@ static inline void cavs_pm_runtime_dis_dmic_clk_gating(uint32_t index)
"dis-dmic-clk-gating index %d CLKCTL %08x",
index, shim_read(SHIM_CLKCTL));
#endif
#if defined(CONFIG_CANNONLAKE) || defined(CONFIG_ICELAKE) \
|| defined(CONFIG_SUECREEK)
/* Disable DMIC clock gating */
io_reg_write(DMICLCTL,
(io_reg_read(DMICLCTL) | DMIC_DCGD));
#endif
}
static inline void cavs_pm_runtime_en_dmic_clk_gating(uint32_t index)
@ -122,6 +129,12 @@ static inline void cavs_pm_runtime_en_dmic_clk_gating(uint32_t index)
"en-dmic-clk-gating index %d CLKCTL %08x",
index, shim_read(SHIM_CLKCTL));
#endif
#if defined(CONFIG_CANNONLAKE) || defined(CONFIG_ICELAKE) \
|| defined(CONFIG_SUECREEK)
/* Enable DMIC clock gating */
io_reg_write(DMICLCTL,
(io_reg_read(DMICLCTL) & ~DMIC_DCGD));
#endif
}
static inline void cavs_pm_runtime_en_dmic_power(uint32_t index)
{

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@ -243,6 +243,9 @@
/* DMIC power ON bit */
#define DMICLCTL_SPA ((uint32_t) BIT(0))
/* DMIC disable clock gating */
#define DMIC_DCGD ((uint32_t) BIT(30))
#ifndef ASSEMBLY
static inline uint16_t shim_read16(uint16_t reg)