diff --git a/src/platform/intel/ace/include/ace/drivers/idc.h b/src/platform/intel/ace/include/ace/drivers/idc.h
new file mode 100644
index 000000000..d57ca3dd7
--- /dev/null
+++ b/src/platform/intel/ace/include/ace/drivers/idc.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ */
+
+#ifdef __PLATFORM_DRIVERS_IDC_H__
+
+#ifndef __ACE_DRIVERS_IDC_H__
+#define __ACE_DRIVERS_IDC_H__
+
+struct idc_msg;
+
+int idc_send_msg(struct idc_msg *msg, uint32_t mode);
+
+int idc_init(void);
+
+#endif /* __ACE_DRIVERS_IDC_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of platform/drivers/idc.h"
+
+#endif /* __PLATFORM_DRIVERS_IDC_H__ */
diff --git a/src/platform/intel/ace/include/ace/drivers/interrupt.h b/src/platform/intel/ace/include/ace/drivers/interrupt.h
new file mode 100644
index 000000000..4b580e4e8
--- /dev/null
+++ b/src/platform/intel/ace/include/ace/drivers/interrupt.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ */
+
+#ifdef __PLATFORM_DRIVERS_INTERRUPT_H__
+
+#ifndef __ACE_DRIVERS_INTERRUPT_H__
+#define __ACE_DRIVERS_INTERRUPT_H__
+
+#endif /* __ACE_DRIVERS_INTERRUPT_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of platform/drivers/interrupt.h"
+
+#endif /* __PLATFORM_DRIVERS_INTERRUPT_H__ */
diff --git a/src/platform/intel/ace/include/ace/lib/mailbox.h b/src/platform/intel/ace/include/ace/lib/mailbox.h
new file mode 100644
index 000000000..68d09e27a
--- /dev/null
+++ b/src/platform/intel/ace/include/ace/lib/mailbox.h
@@ -0,0 +1,97 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ *
+ * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
+ *         Keyon Jie <yang.jie@linux.intel.com>
+ */
+
+#ifdef __PLATFORM_LIB_MAILBOX_H__
+
+#ifndef __ACE_LIB_MAILBOX_H__
+#define __ACE_LIB_MAILBOX_H__
+
+#include <sof/debug/panic.h>
+#include <sof/lib/memory.h>
+#include <rtos/string.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#define MAILBOX_HOSTBOX_BASE	SRAM_INBOX_BASE
+
+ /* window 3 - trace */
+#define MAILBOX_TRACE_SIZE	SRAM_TRACE_SIZE
+#define MAILBOX_TRACE_BASE	SRAM_TRACE_BASE
+
+#define MAILBOX_STREAM_SIZE	SRAM_STREAM_SIZE
+#define MAILBOX_STREAM_BASE	SRAM_STREAM_BASE
+
+ /* window 1 inbox/downlink and FW registers */
+#define MAILBOX_HOSTBOX_SIZE	SRAM_INBOX_SIZE
+
+ /* window 0 */
+#define MAILBOX_DSPBOX_SIZE	SRAM_OUTBOX_SIZE
+#define MAILBOX_DSPBOX_BASE	SRAM_OUTBOX_BASE
+
+#define MAILBOX_SW_REG_SIZE	SRAM_SW_REG_SIZE
+#define MAILBOX_SW_REG_BASE	SRAM_SW_REG_BASE
+
+static inline void mailbox_sw_reg_write(size_t offset, uint32_t src)
+{
+	volatile uint32_t *ptr;
+	volatile uint32_t __sparse_cache *ptr_c;
+
+	ptr_c = (volatile uint32_t __sparse_cache *)(MAILBOX_SW_REG_BASE + offset);
+	ptr = cache_to_uncache(ptr_c);
+	*ptr = src;
+}
+
+static inline void mailbox_sw_reg_write64(size_t offset, uint64_t src)
+{
+	volatile uint64_t *ptr;
+	volatile uint64_t __sparse_cache *ptr_c;
+
+	ptr_c = (volatile uint64_t __sparse_cache *)(MAILBOX_SW_REG_BASE + offset);
+	ptr = cache_to_uncache(ptr_c);
+	*ptr = src;
+}
+
+static inline uint32_t mailbox_sw_reg_read(size_t offset)
+{
+	volatile uint32_t *ptr;
+	volatile uint32_t __sparse_cache *ptr_c;
+
+	ptr_c = (volatile uint32_t __sparse_cache *)(MAILBOX_SW_REG_BASE + offset);
+	ptr = cache_to_uncache(ptr_c);
+
+	return *ptr;
+}
+
+static inline uint64_t mailbox_sw_reg_read64(size_t offset)
+{
+	volatile uint64_t *ptr;
+	volatile uint64_t __sparse_cache *ptr_c;
+
+	ptr_c = (volatile uint64_t __sparse_cache *)(MAILBOX_SW_REG_BASE + offset);
+	ptr = cache_to_uncache(ptr_c);
+
+	return *ptr;
+}
+
+static inline void mailbox_sw_regs_write(size_t offset, const void *src, size_t bytes)
+{
+	int regs_write_err __unused = memcpy_s((void *)(MAILBOX_SW_REG_BASE + offset),
+					       MAILBOX_SW_REG_SIZE - offset, src, bytes);
+
+	assert(!regs_write_err);
+	dcache_writeback_region((__sparse_force void __sparse_cache *)(MAILBOX_SW_REG_BASE +
+								       offset), bytes);
+}
+
+#endif /* __ACE_LIB_MAILBOX_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of platform/lib/mailbox.h"
+
+#endif /* __PLATFORM_LIB_MAILBOX_H__ */
diff --git a/src/platform/intel/ace/lib/pm_runtime.c b/src/platform/intel/ace/lib/pm_runtime.c
new file mode 100644
index 000000000..07e9b7d79
--- /dev/null
+++ b/src/platform/intel/ace/lib/pm_runtime.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: BSD-3-Clause
+//
+// Copyright(c) 2022 Intel Corporation. All rights reserved.
+
+#include <sof/lib/pm_runtime.h>
+#include <sof/lib/uuid.h>
+#include <sof/trace/trace.h>
+#include <user/trace.h>
+#include <sof_versions.h>
+#include <stdint.h>
+
+/* 76cc9773-440c-4df9-95a8-72defe7796fc */
+DECLARE_SOF_UUID("power", power_uuid, 0x76cc9773, 0x440c, 0x4df9,
+		 0x95, 0xa8, 0x72, 0xde, 0xfe, 0x77, 0x96, 0xfc);
+
+DECLARE_TR_CTX(power_tr, SOF_UUID(power_uuid), LOG_LEVEL_INFO);
+
+void platform_pm_runtime_init(struct pm_runtime_data *prd)
+{ }
+
+void platform_pm_runtime_get(enum pm_runtime_context context, uint32_t index,
+			     uint32_t flags)
+{ }
+
+void platform_pm_runtime_put(enum pm_runtime_context context, uint32_t index,
+			     uint32_t flags)
+{ }
+
+void platform_pm_runtime_prepare_d0ix_en(uint32_t index)
+{ }
diff --git a/src/platform/meteorlake/include/platform/drivers/alh.h b/src/platform/meteorlake/include/platform/drivers/alh.h
new file mode 100644
index 000000000..bd2946104
--- /dev/null
+++ b/src/platform/meteorlake/include/platform/drivers/alh.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ */
+
+#ifdef __SOF_DRIVERS_ALH__
+
+#ifndef __PLATFORM_DRIVERS_ALH__
+#define __PLATFORM_DRIVERS_ALH__
+
+#include <stdint.h>
+
+#endif /* __PLATFORM_DRIVERS_ALH__ */
+
+#else
+
+#error "This file shouldn't be included from outside of sof/drivers/alh.h"
+
+#endif
diff --git a/src/platform/meteorlake/include/platform/drivers/idc.h b/src/platform/meteorlake/include/platform/drivers/idc.h
new file mode 100644
index 000000000..593b567b0
--- /dev/null
+++ b/src/platform/meteorlake/include/platform/drivers/idc.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ */
+
+#ifdef __SOF_DRIVERS_IDC_H__
+
+#ifndef __PLATFORM_DRIVERS_IDC_H__
+#define __PLATFORM_DRIVERS_IDC_H__
+
+#include <ace/drivers/idc.h>
+
+#endif /* __PLATFORM_DRIVERS_IDC_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of sof/drivers/idc.h"
+
+#endif /* __SOF_DRIVERS_IDC_H__ */
diff --git a/src/platform/meteorlake/include/platform/drivers/interrupt.h b/src/platform/meteorlake/include/platform/drivers/interrupt.h
new file mode 100644
index 000000000..4bea8d844
--- /dev/null
+++ b/src/platform/meteorlake/include/platform/drivers/interrupt.h
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ *
+ * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
+ *         Keyon Jie <yang.jie@linux.intel.com>
+ *         Rander Wang <rander.wang@intel.com>
+ */
+
+#ifdef __SOF_DRIVERS_INTERRUPT_H__
+
+#ifndef __PLATFORM_DRIVERS_INTERRUPT_H__
+#define __PLATFORM_DRIVERS_INTERRUPT_H__
+
+#if !defined(__ASSEMBLER__) && !defined(LINKER)
+
+#include <ace/drivers/interrupt.h>
+
+#include <rtos/bit.h>
+
+#endif
+
+/* Required by sof/drivers/interrupt.h */
+#define PLATFORM_IRQ_CHILDREN	32
+
+/* Required by zephyr/wrapper.c */
+#define IRQ_NUM_EXT_LEVEL2	4	/* level 2 */
+#define IRQ_NUM_EXT_LEVEL5	16	/* level 5 */
+
+#endif /* __PLATFORM_DRIVERS_INTERRUPT_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of sof/drivers/interrupt.h"
+
+#endif /* __SOF_DRIVERS_INTERRUPT_H__ */
diff --git a/src/platform/meteorlake/include/platform/lib/dai.h b/src/platform/meteorlake/include/platform/lib/dai.h
new file mode 100644
index 000000000..2b6386a35
--- /dev/null
+++ b/src/platform/meteorlake/include/platform/lib/dai.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ *
+ * Author: Marcin Maka <marcin.maka@linux.intel.com>
+ */
+
+#ifdef __SOF_LIB_DAI_H__
+
+#ifndef __PLATFORM_LIB_DAI_H__
+#define __PLATFORM_LIB_DAI_H__
+
+/* SSP */
+
+/*
+ * Number of base and extended SSP ports must be defined separately
+ * since some HW registers are in two groups, one for base and one
+ * for extended.
+ */
+
+/** \brief Number of 'base' SSP ports available */
+#define DAI_NUM_SSP_BASE	6
+
+/* HD/A */
+
+/** \brief Number of HD/A Link Outputs */
+#define DAI_NUM_HDA_OUT		9
+
+/** \brief Number of HD/A Link Inputs */
+#define DAI_NUM_HDA_IN		7
+
+/* ALH */
+
+/** \brief Number of ALH bi-directional links */
+#define DAI_NUM_ALH_BI_DIR_LINKS	16
+
+/** \brief Number of contiguous ALH bi-dir links */
+#define DAI_NUM_ALH_BI_DIR_LINKS_GROUP	4
+
+#endif /* __PLATFORM_LIB_DAI_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of sof/lib/dai.h"
+
+#endif /* __SOF_LIB_DAI_H__ */
diff --git a/src/platform/meteorlake/include/platform/lib/dma.h b/src/platform/meteorlake/include/platform/lib/dma.h
new file mode 100644
index 000000000..ca10b4937
--- /dev/null
+++ b/src/platform/meteorlake/include/platform/lib/dma.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ */
+
+#ifdef __SOF_LIB_DMA_H__
+
+#ifndef __PLATFORM_LIB_DMA_H__
+#define __PLATFORM_LIB_DMA_H__
+
+/* max number of supported DMA channels */
+#define PLATFORM_MAX_DMA_CHAN	9
+
+/* number of supported DMACs */
+#define PLATFORM_NUM_DMACS	6
+
+#endif /* __PLATFORM_LIB_DMA_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of sof/lib/dma.h"
+
+#endif /* __SOF_LIB_DMA_H__ */
diff --git a/src/platform/meteorlake/include/platform/lib/mailbox.h b/src/platform/meteorlake/include/platform/lib/mailbox.h
new file mode 100644
index 000000000..3b7f218ad
--- /dev/null
+++ b/src/platform/meteorlake/include/platform/lib/mailbox.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ */
+
+#ifdef __SOF_LIB_MAILBOX_H__
+
+#ifndef __PLATFORM_LIB_MAILBOX_H__
+#define __PLATFORM_LIB_MAILBOX_H__
+
+#include <ace/lib/mailbox.h>
+
+#endif /* __PLATFORM_LIB_MAILBOX_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of sof/lib/mailbox.h"
+
+#endif /* __SOF_LIB_MAILBOX_H__ */
diff --git a/src/platform/meteorlake/include/platform/lib/pm_runtime.h b/src/platform/meteorlake/include/platform/lib/pm_runtime.h
new file mode 100644
index 000000000..bbf7c018e
--- /dev/null
+++ b/src/platform/meteorlake/include/platform/lib/pm_runtime.h
@@ -0,0 +1,70 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ *
+ * Author: Tomasz Lauda <tomasz.lauda@linux.intel.com>
+ */
+
+/**
+ * \file platform/tigerlake/include/platform/lib/pm_runtime.h
+ * \brief Runtime power management header file for Tigerlake
+ * \author Tomasz Lauda <tomasz.lauda@linux.intel.com>
+ */
+
+#ifdef __SOF_LIB_PM_RUNTIME_H__
+
+#ifndef __PLATFORM_LIB_PM_RUNTIME_H__
+#define __PLATFORM_LIB_PM_RUNTIME_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+
+/**
+ * \brief extra pwr flag to power up a core with a specific reason
+ * it can be powered down only with the same reason (flag)
+ */
+#define PWRD_MASK	MASK(31, 30)
+#define PWRD_BY_HPRO	BIT(31)		/**< requested by HPRO */
+#define PWRD_BY_TPLG	BIT(30)		/**< typical power up */
+
+struct pm_runtime_data;
+
+/**
+ * \brief Initializes platform specific runtime power management.
+ * \param[in,out] prd Runtime power management data.
+ */
+void platform_pm_runtime_init(struct pm_runtime_data *prd);
+
+/**
+ * \brief Retrieves platform specific power management resource.
+ *
+ * \param[in] context Type of power management context.
+ * \param[in] index Index of the device.
+ * \param[in] flags Flags, set of RPM_...
+ */
+void platform_pm_runtime_get(uint32_t context, uint32_t index, uint32_t flags);
+
+/**
+ * \brief Releases platform specific power management resource.
+ *
+ * \param[in] context Type of power management context.
+ * \param[in] index Index of the device.
+ * \param[in] flags Flags, set of RPM_...
+ */
+void platform_pm_runtime_put(uint32_t context, uint32_t index, uint32_t flags);
+
+void platform_pm_runtime_prepare_d0ix_en(uint32_t index);
+
+void platform_pm_runtime_enable(uint32_t context, uint32_t index);
+
+void platform_pm_runtime_disable(uint32_t context, uint32_t index);
+
+bool platform_pm_runtime_is_active(uint32_t context, uint32_t index);
+
+#endif /* __PLATFORM_LIB_PM_RUNTIME_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of sof/lib/pm_runtime.h"
+
+#endif /* __SOF_LIB_PM_RUNTIME_H__ */
diff --git a/src/platform/meteorlake/include/platform/trace/trace.h b/src/platform/meteorlake/include/platform/trace/trace.h
new file mode 100644
index 000000000..b69592196
--- /dev/null
+++ b/src/platform/meteorlake/include/platform/trace/trace.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Copyright(c) 2022 Intel Corporation. All rights reserved.
+ */
+
+#ifdef __SOF_TRACE_TRACE_H__
+
+#ifndef __PLATFORM_TRACE_TRACE_H__
+#define __PLATFORM_TRACE_TRACE_H__
+
+#include <sof/lib/cpu.h>
+#include <sof/lib/mailbox.h>
+#include <sof/lib/memory.h>
+#include <stdint.h>
+
+/* Platform defined trace code */
+static inline void platform_trace_point(uint32_t x)
+{ }
+
+#endif /* __PLATFORM_TRACE_TRACE_H__ */
+
+#else
+
+#error "This file shouldn't be included from outside of sof/trace/trace.h"
+
+#endif /* __SOF_TRACE_TRACE_H__ */