topology: introduce pipe-host-volume-playback

Add a new pipeline definition to avoid mucking with either
pipe-low-latency or pipe-media.

The code is 90% similar to pipeline-volume-playback but includes a
scheduling component.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This commit is contained in:
Pierre-Louis Bossart 2020-06-27 12:47:09 -05:00 committed by Liam Girdwood
parent b971f2b753
commit 7189916c53
1 changed files with 86 additions and 0 deletions

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# Host PCM Volume playback pipeline
#
# Pipeline Endpoints for connection are :-
#
# host PCM_P --> B0 --> Volume 0 --> B1 --> [other pipeline]
# Include topology builder
include(`utils.m4')
include(`buffer.m4')
include(`pcm.m4')
include(`pga.m4')
include(`dai.m4')
include(`mixercontrol.m4')
include(`pipeline.m4')
#
# Controls
#
# Volume Mixer control with max value of 32
C_CONTROLMIXER(Playback Volume, PIPELINE_ID,
CONTROLMIXER_OPS(volsw, 256 binds the mixer control to volume get/put handlers, 256, 256),
CONTROLMIXER_MAX(, 32),
false,
CONTROLMIXER_TLV(TLV 32 steps from -64dB to 0dB for 2dB, vtlv_m64s2),
Channel register and shift for Front Left/Right,
LIST(` ', KCONTROL_CHANNEL(FL, 1, 0), KCONTROL_CHANNEL(FR, 1, 1)))
#
# Volume configuration
#
W_VENDORTUPLES(playback_pga_tokens, sof_volume_tokens,
LIST(` ', `SOF_TKN_VOLUME_RAMP_STEP_TYPE "0"'
` ', `SOF_TKN_VOLUME_RAMP_STEP_MS "250"'))
W_DATA(playback_pga_conf, playback_pga_tokens)
#
# Components and Buffers
#
# Host "Playback" PCM
# with 2 sink and 0 source periods
W_PCM_PLAYBACK(PCM_ID, Playback, 2, 0, SCHEDULE_CORE)
# "Volume" has 2 source and x sink periods
W_PGA(0, PIPELINE_FORMAT, DAI_PERIODS, 2, playback_pga_conf, SCHEDULE_CORE,
LIST(` ', "PIPELINE_ID Playback Volume"))
# Playback Buffers
W_BUFFER(0, COMP_BUFFER_SIZE(2,
COMP_SAMPLE_SIZE(PIPELINE_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)),
PLATFORM_HOST_MEM_CAP, SCHEDULE_CORE)
W_BUFFER(1, COMP_BUFFER_SIZE(DAI_PERIODS,
COMP_SAMPLE_SIZE(DAI_FORMAT), PIPELINE_CHANNELS, COMP_PERIOD_FRAMES(PCM_MAX_RATE, SCHEDULE_PERIOD)),
PLATFORM_DAI_MEM_CAP, SCHEDULE_CORE)
#
# Pipeline Graph
#
# host PCM_P --> B0 --> Volume 0 --> B1 --> sink DAI0
P_GRAPH(pipe-host-vol-playback-PIPELINE_ID, PIPELINE_ID,
LIST(` ',
`dapm(N_BUFFER(0), N_PCMP(PCM_ID))',
`dapm(N_PGA(0), N_BUFFER(0))',
`dapm(N_BUFFER(1), N_PGA(0))'))
#
# Pipeline Source and Sinks
#
indir(`define', concat(`PIPELINE_SOURCE_', PIPELINE_ID), N_BUFFER(1))
indir(`define', concat(`PIPELINE_PCM_', PIPELINE_ID), Playback PCM_ID)
#
# Pipeline Configuration.
#
W_PIPELINE(SCHED_COMP, SCHEDULE_PERIOD, SCHEDULE_PRIORITY, SCHEDULE_CORE, SCHEDULE_TIME_DOMAIN, pipe_media_schedule_plat)
#
# PCM Configuration
#
PCM_CAPABILITIES(Playback PCM_ID, `S32_LE,S24_LE,S16_LE', PCM_MIN_RATE, PCM_MAX_RATE, 2, PIPELINE_CHANNELS, 2, 16, 192, 16384, 65536, 65536)