From 6ddd6554b9a8fd2386b588cda0c27d649969ca14 Mon Sep 17 00:00:00 2001
From: Rander Wang <rander.wang@intel.com>
Date: Tue, 11 Jul 2023 13:27:29 +0800
Subject: [PATCH] west.yml: upgrade Zephyr revision - Restore IDC interrupt on
 D3 exit

After exiting D3 state if IMR context save is enabled, IDC interrupt
must be re-enabled again for all cores. It fixes multicore CI test
issue.

431108d89e175: intel_adsp: ace: Restore IDC interrupt on D3 exit

Signed-off-by: Rander Wang <rander.wang@intel.com>
---
 west.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/west.yml b/west.yml
index 4c3dd144e..701c9d661 100644
--- a/west.yml
+++ b/west.yml
@@ -45,7 +45,7 @@ manifest:
 
     - name: zephyr
       repo-path: zephyr
-      revision: 23b3cae1b1d91cd064d31cdeb78e3a6127b5051d
+      revision: 431108d89e1750dbea05dce64dbb7fd329aa610e
       remote: zephyrproject
 
       # Import some projects listed in zephyr/west.yml@revision